Briefly, without looking it up I can tell you for BFL:
16 engines/chip, just under 500MHz, USB only. No idea about interconnect.
Topic: ASIC architectures? (Read 968 times)
Are the architectures of some of the current ASIC offerings described anywhere?
- How many SHA256 cores do they typically have per die?
- At what frequency or throughput do the cores operate?
- What kind of external interface do they have?
- What kind of chip to chip interconnect do they have?
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