Topic: Avalon chip (Read 8525 times)

I would be surprised if the modules were much under $200, at least at this point. For one, in the $80 estimate for chips the cost of sawing and packaging isn't included unless I missed it in the quote. Second, the misc components on the board do add up, especially things like connectors and inductors. Given the simple nature of the chips they might not need anything like a 6 layer board where things get much more expensive, but $10 for the PCB, smaller PCB as well as assembly seems low even for China. Also, the heatsink is not going to be a negligible cost. Again, I'm more used to dealing with companies like Aavid and it might be different locally in China, but those heatsinks are not going to be a couple dollar items.

I have to admire them for making such a complex machine and even made it working    Their flexibility is very high, after seeing BFL design plan, I never expect that they will take this route and win the race through another way

I remember Inaba has guessed that they will use more than 64 chips to reach the 60G hash specification, but they managed to put 320 chips in  each unit at maximum

Discussed already in relation to another chip using the same package:

https://bitcointalksearch.org/topic/block-erupter-dedicated-mining-asic-project-open-for-discussion-91173

Well since someone from Avalon is once again replying on the forum I'd like to give you these two links ... read them carefully ...
http://gpl-violations.org/faq/vendor-faq.html
http://gpl-violations.org/faq/sourcecode-faq.html

Well wafer quantity matters in that fact that it does have a cost.  If the speculation quoted in the OP is correct 4050 Avalon chips would fit on 110nm water which makes the production cost roughly $1 per chip.  320 chips
In decent sized volume maybe $5K per wafer or if the specs on chip size are right about ~$1 per chip.  You could round up to $2 per chip to be conservative and include production losses.

Wafer quantity/diameter is immaterial here. By the standards of semiconductor manufacturing this will be "short run" even if wildly successfull by the Bitcoin standard. The critical parameter was "shortest waiting time" or some variant of it.

This is kind-of mirror image of the Quantum Bigfoot story:

http://en.wikipedia.org/wiki/Quantum_Bigfoot_(hard_drive)

where 5.25" drives were awkwardly mounted in cases designed for 3.5" hard drives using custom brackets. The reason: Quantum had a lot of 5.25" machinery available to manufacture them cheaply and quickly. It is noteworthy that Wikipedia had removed any mention of this because it wasn't properly sourced. Well, it would be hard to find internal Quantum documents on the open Internet.

Semiconductor manufacturing is the same, except the diameter gets always increased with the next generation of machinery.
 

Why would you think they are running out of money?   How much does a wafer run after you have the die made?

ngzhang, my respect meter went off the chart (positive) when I read the first post, but was reset when I read your followup reply. To quote the mighty Rushbaugh, "Words mean things!"

Later, bud.

~Bruno K~

I'm very suprised by the number of chips on each avalon module: 80 chips !

240 chips per unit, this means they will have to buy a lot of wafers to produce enough chips to be put in the first batch avalon: 240x300= 72000 chips /4000 chips/wafer, 18 wafers at least! I guess 20 in total

And another big cost is R&D, maybe even higher than material, so I guess they are running out of money right now and need some liquidity injecton, otherwise they will not be able to deliver the first batch, not even mention the second batch

But they are not open with their situation, so no one could give them a hand

That's a pretty fair way to estimate it, and I tried thinking about it that way at one point as well..mainly since the majority of miners are in it for the money more so than the security it brings to the network. I found that, at least for GPUs, price and difficulty seemed to correlate to around an 8-10 month payoff...the point in which the $300 GPU (or any price really) finally pays for itself and you can make a return. So long as a miner was able to eventually turn a profit, they continued to mine.

That's also probably part of the reason we're seeing an increase in difficulty now...since the price is above $20, many smaller miners are able to cover energy costs and profit once more.

EDIT: I can't seem to find my stats on this stuff. I'll have to check again when I'm home from work.

My old estimate was based on dollars per hash/second.  ASICs provide roughly 25-35 times the hashrate per dollar cost, ignoring operational costs.  Thus, my short-medium term projection was about 75 million difficulty.  As the fixed costs of ASIC production dwindle and devices start being sold closer to their marginal costs, I expect another doubling, to around 150 million difficulty. *

My current thinking is that those two moves will appear as a single steady rise, rather than two discrete actions.  I would expect we'll be near 75 million by July, and 150 million by October, roughly a 50% increase every month, starting more or less now.

After that, I think a 10% monthly growth rate is fairly reasonable.  The network will be big enough that each new batch coming online will be a smaller fraction of the whole, but the units will also be cheaper.  10% seems like a reasonable balance point.  In my projections, I use an abrupt transition, but I expect a rounder corner in reality.

I'm hoping that my estimates are very aggressive.  If I'm underestimating the difficulty in any given period by very much at all, then the second or third Avalon batch, and other units with similar costs and delivery timelines (which might possibly include BFL) will be at best slightly profitable over the first year.  The biggest winners could very easily be those that got in on the very first batches, and those than come in much later, when the per-unit costs are dominant. **

* Note that I use difficulty in my work, not hash rate.  The exchange rate is roughly 1 Mdiff=7Thash/sec.  My 75 Mdiff short-medium target is roughly double Korbman's minimum 1st gen estimate, or about 525 Thash/sec.  My medium-long target of 150 is roughly 1 Petahash/sec.

** I place an upper bound of $200 on the part cost per module in Avalon, not counting the fixed costs.  This is using very rough estimates for a bunch of things.  Napkin quality work, at best.  I could refine it a bit if I had the board specs (dimensions and layer count) along with the part numbers of the non-ASIC components on the boards, but I probably won't bother.

maybe one or two years later.



"The story is enough to write a novel"

Precisely. The way I've been looking at it, the absolutely minimum for first gen will probably be around 250-300TH/s (tripling BFL's preorder count, adding Avalon's batch #1 and #2, and tossing in ASICMiner as well). It'll only go up from there once people see working devices, as well as Gen 2 speculation.

Well tell me where I am wrong.

The shape of the curve depends on how aggressive both companies can be in moving units.  For Avalon how quickly will all batch 2 customers get their units, will there be a delay on batch3, etc.  For BFL can they get out the door in Feb and once they do how many units per week can they sustain in production.  The end state is much higher difficulty it really just depends on how steep the curve is. 

I agree as well, I have been doing some calculations on difficulty and I have a calendar with estimates to see if it is staying on the curve I believe we are heading on.   The next month will be crucial to give us the pace for the next 6 months.  

@DeathAndTaxes

here is no personal offence, but your deduce in this thread are totally in-correct.

From the OP it is interesting to see how low prices can eventually go.  If the quote is correct then the production cost of just the chips is roughly $1 per chip (or ~$4 per GH/s).    Remember the seller has hundreds of thousands in NRE costs to overcome but they will be paid down eventually.  Lets ignore the powersupply, controller, fans, and case because the designer could just sell modules.  

PCB printing and placement ~$10 + $80 in chips plus maybe $20 in misc components (resistors, capacitors, voltage regulators) say a total SWAG of $110 per board.  Note I am not accusing the sellers of price gouging.   They did take a large risk, and have lots of NRE costs to cover.   Also they will want to retain capital to make the "next gen" unit eventually.  I am just pointing out that difficulty is going up a LOT.  People thinking no more than 10x are going to be horribly disappointed.  In the short term 30x to 50x is more likely.  In the longer term (a year or more so both Avalon and BFL have time to release their "next gen" products) 100x to 200x isn't impossible.  Why?  When sales flatline they (both companies) can cut the price and sell more.  

@DeathAndTaxes

Will the "hashers working in parallel" reduce the power consumption measured in J/Hash? Or it will just reduce the cost of the chip measured in USD/Ghashes?

Generally no and especially not for "first gen" product.  The larger the die size the larger the % of chips lost due to fabrication errors. For a design like this you can't have a chip "half good" so any functional defect means a lost chip.  The size of the die is likely based on the vendor (i.e. people actually making the chip) recommendation.  

It is a tradeoff.  A single 22GH/s chip would either need to be massively parallel (i.e. one chip is designed to split the work among multiple hashing engines working in parallel (multiple nonces checked per clock cycle) or  it would need to run at an insanely high clock (to complete 22 GH/s using a single hashing engine would require a clock speed of 22 Ghz obviously impractical).

Based on the photo and specs my guess is that each Avalon chip completes a single SHA-256 double hash per clock and runs at ~275Mhz.  So if you had a board with a single chip it would use about 2W and produce complete 275 million double SHA-256 hashes per second obviously that is impractical so a board consists of 80 chips working together to produce 22 GH/s (80 * 0.275 Gh/s per chip = 22 Gh/s per board).  To do this with one chip at the same clock speed would require the chip have 80 hashing engines.  That would make the die 80 times as large. 

The entire unit is simply a controller, powersupply, and logic boards to route block headers to the individual hashing chips and "golden nonces" (diff 1 = 1 in 2^32 hashes) back to the controller for verification.  How the work gets broken up is simply a design choice you could make a 66 GH/s miner using 66,000 chips with a hashrate of 1 Mh/s ea or a single chip with a hashrate of 66 GH/s.  Everything being equal having fewer larger chips simplifies board design, assembly and production however larger chips mean higher power density (harder to cool 100W in one chip then 100W spread out over a board) and lower chip yields so neither extreme is attractive. The sweetspot tends to be in the middle. 

The next gen (not batch2, or 3 but the next design) will get more parallel.  Instead of 320 chips which have a single "hashing engine each" you could use 40 larger chips with 8 hashing engines.  If ASIC production remains competitive maybe in a few generations you will see much larger chips capable of high GH/s speed (say 20 hashing engines inside a single chip running at 800 MHz completing 16 GH/s per chip).

Thank you ngzhang for the clarification and info, it is appreciated!

Avalon chip is NOT a hardcopy or something  similar.
meanwhile, it is NOT a full custom ASIC too.

Avalon ASIC is designed with standard cell.


this is reality.


power consumption details by actual measurement :

Chip power efficienty: ~6.6W/GHs @ 1.15 V
Module power consumption: 149W @ 20.048GHs/ 164W@ 22.560GHs
machine power consumption: 67.68G for ~595W @ 220V-AC/ ~620W @ 120V-AC

This "hardcopy" comment is just misinformation.

Various FPGA copy processes need to be ordered through the respective intelectual property owner, eg.

HardCopy through Altera
EasyPath through Xilinx
etc.

In case of Avalon if this was an FPGA copy they would place an order with Xilinx not with TSMC.

It clearly is a custom ASIC.

Now the adjective "full" has no well-defined meaning next to "custom ASIC". By my reading of the posts in this forum only two persons creatures are working on a full custom ASIC: bitfury and yohan yohan's cat.
The distinctive mark of a full custom designer is that his simulation result errors are narrower than the manufacturing process variance. The way I interpret the words "full custom" would mean that the designer had run an analog level simulation on BSIM (or an equivalent toolset). The error-bounds on such simulations are very narrow, in fact the proper simulation would consist of multiple simulation runs modeling various corners of the manufacturing process. This is just time consuming.

It is of course possible that some vendor really does full custom design, but deliberately spreads misinformation on this forum to hide their intellectual property.

It is also possible that some vendor is in a posession of some EDA tool that they don't have a full license and/or don't fully understand how to operate and/or don't have all the required input data for models. This would be another explanation of unusually wide error bounds on simulation.

They've changed it on their site now http://launch.avalon-asics.com/#features

Hashrate: greater than 66 Gh/s
Power Consumption: 620w@120v AC

Yeah, 600w for 66GH/s ..only 33% higher than they advertise on their site.

EDIT: I stand corrected, it looks like they finally changed the specs on their site.

That pic was showing a meter at almost 600w... that's a bit higher than anticipated.  Can someone translate the explanation of that pic?  Is that 600w at 66GH/s?

"Avalon ASIC will not be responsible for if a proper Integrated Circuit company enters the market and produce a full-custom ASIC chip. Please evaluate your mining projections properly when purchasing Avalon ASIC."
http://launch.avalon-asics.com/?page_id=778

If it were an ASIC, would it be just one chip?

... Proof?

To quote something in a locked thread, get the post's individual ID number (shown by hovering over the # post link), then click quote on something in your unlocked thread (this one) but change the quote= parameter to the locked thread's quote #.

Each chip has about 280MH / s, this means that they are a hardcopy of a FPGA and not a full custom ASIC.

I wanted to restart the discussion from the thread that is now locked:

https://bitcointalksearch.org/topic/m.1402474

I cannot quote directly, so I'm going to do a little cut and paste quotes.

Pictures of the open Avalon modules are now available:

http://bbs.btcman.com/forum.php?mod=viewthread&tid=1304

There are 80 chips per module.