1x per BB PCI-E 6pin 1.2 €
1x per BB Digilent SMT1 USB-Jtag module costs 30 € + vat.
1x per MMP Mini USB-UART with CP1202 costs 4x 13 € + vat.
Possible instead of using 4x CP1202 it is possible to use 2x FT2232H modules...
If we put 5 MPP on board, one can be support JTAG + UART, the rest both modules supports the other uarts...
Topic: Building own multi plug base board for AVNets MMP (Read 1105 times)
Checked on base boards bom the following mechanical connectors are needed for every MMP:
The SMT are cheap and costs 1,63 $ each. But the MMP are expensive with costs of 13,51$ each and can only bought in bulk of 20 pieces
. This supports up to 10 MMPs or 2,5 quad boards.
| BB | JX1 | MMP Connector - Main (Tyco 1658016-3) | Tyco 1658016-3 | CON_TE-1658016-3 |
| BB | JX2 | MMP Connector - Main (Tyco 1658016-3) | Tyco 1658016-3 | CON_TE-1658016-3 |
| BB | J10 | .050" Mini Header, 10 position, SMT | Samtec FW-05-05-F-D-490- | 160-A |
The SMT are cheap and costs 1,63 $ each. But the MMP are expensive with costs of 13,51$ each and can only bought in bulk of 20 pieces
. This supports up to 10 MMPs or 2,5 quad boards.
I'm checking which pdc could be used for the mmp module.
The pdc should have sense, should have input from 12V rail.
The MMP needs normally for full function the following 8 rails which have sense lines:
1.0V @ 6A for Vccint/bram (FPGA core J9,K8,K10,K12,K14,L9,L13,L15,M8,M14,N9,N15,P14,R15,T14,U15/N13,R13,T12,U13)
1.0V @ 6A for MGTAVcc (FPGA MGTA C6,E6,E6,J6,L6)
1.5V @ 4A for Vccddr (DDR3 SDRAM, 200MHz Clock)
1.2V @ 4A for MGTAVt
1.8V @ 6A for Vaux (USB3 Interface)
2.0V @ 1A for Vccaux_io
2.5V @ 4A for Vcco (Ethernet, I2C EEPROM, Parallel Flash, XADC, TI CDCM6001, EMCCLK)
3.3V @ 1A for Vcc33 (GTC Clock Source)
There is also an Vref of 0.75V needed.
For the active fan on heatsink 12V is needed, which could comes directly from the 12V PSU.
Regulation for for fans could be an option.
The currents are in discussion. Related on the real work Vccint current should be increased to 16 A (12A minimum) because of for mining the official current of 6A is only working up to hashing with 350 MH/s on one ring.
For aux so high currents should only be needed for massive io. At the moment only uart and clock is used.
So 2.0V must not be used for aux. 1.8V should be ok. 1.8V for USB3 could be nice only if uart chip is not used.
2.5V is needed for programming and some other nice issues.
1.5V DDR current should be ok for future litecoin mining or other memory related work.
In my opinion Vccint/bram + MGTMVcc should been used only one rail :/ But because of the sense lines it is better to have different rails but with higher current. I guess 2x 1V@12A should been enough, more is good, too.
Vccddr could been have there own rail. The other voltages could been shared between all boards, evtl. without sense lines related on there real work. I will check costs differences later.
To support the planned Digilent jtag-usb board SMT1 3.3V main power is needed + seperate Vref drives JTAG signal voltages. On AVNets BB 2.5V is used for Vref.
USB UART use the 5V from the connected USB port, so if an USB-UART is planned no special power supply is needed (eg. for cp120x).
The pdc should have sense, should have input from 12V rail.
The MMP needs normally for full function the following 8 rails which have sense lines:
1.0V @ 6A for Vccint/bram (FPGA core J9,K8,K10,K12,K14,L9,L13,L15,M8,M14,N9,N15,P14,R15,T14,U15/N13,R13,T12,U13)
1.0V @ 6A for MGTAVcc (FPGA MGTA C6,E6,E6,J6,L6)
1.5V @ 4A for Vccddr (DDR3 SDRAM, 200MHz Clock)
1.2V @ 4A for MGTAVt
1.8V @ 6A for Vaux (USB3 Interface)
2.0V @ 1A for Vccaux_io
2.5V @ 4A for Vcco (Ethernet, I2C EEPROM, Parallel Flash, XADC, TI CDCM6001, EMCCLK)
3.3V @ 1A for Vcc33 (GTC Clock Source)
There is also an Vref of 0.75V needed.
For the active fan on heatsink 12V is needed, which could comes directly from the 12V PSU.
Regulation for for fans could be an option.
The currents are in discussion. Related on the real work Vccint current should be increased to 16 A (12A minimum) because of for mining the official current of 6A is only working up to hashing with 350 MH/s on one ring.
For aux so high currents should only be needed for massive io. At the moment only uart and clock is used.
So 2.0V must not be used for aux. 1.8V should be ok. 1.8V for USB3 could be nice only if uart chip is not used.
2.5V is needed for programming and some other nice issues.
1.5V DDR current should be ok for future litecoin mining or other memory related work.
In my opinion Vccint/bram + MGTMVcc should been used only one rail :/ But because of the sense lines it is better to have different rails but with higher current. I guess 2x 1V@12A should been enough, more is good, too.
Vccddr could been have there own rail. The other voltages could been shared between all boards, evtl. without sense lines related on there real work. I will check costs differences later.
To support the planned Digilent jtag-usb board SMT1 3.3V main power is needed + seperate Vref drives JTAG signal voltages. On AVNets BB 2.5V is used for Vref.
USB UART use the 5V from the connected USB port, so if an USB-UART is planned no special power supply is needed (eg. for cp120x).
I used the KC705_Experimental Vivado design from Official Open Source FPGA Bitcoin Miner and changed the target device and the i/o pins for clock and uart tx/rx. I used the official AVNet Baseboard + the TI Switching Power Module for my first tests.
With 400 MHz I got > 50 % invalids I guess because of the pdc limit of 6A for Vcc. The design needs round about 8 W so I reduced the clock for hashing to 350 MHs and now have invalids < 0.1 %.
There is an 2nd 1V rail named Vmgt on the switching module and I will check the rails could been combined (will check the TI datasheets. Sometimes chips allows the combining to increase the current).
With 400 MHz I got > 50 % invalids I guess because of the pdc limit of 6A for Vcc. The design needs round about 8 W so I reduced the clock for hashing to 350 MHs and now have invalids < 0.1 %.
There is an 2nd 1V rail named Vmgt on the switching module and I will check the rails could been combined (will check the TI datasheets. Sometimes chips allows the combining to increase the current).
Hello,
because of the low price of AVNets Kintex-7 325 Evaluation MMP module (est. 890 $) but the high price of the needed base board (500$) + the to less Vcc distributed current (6A) and high price pdc (300 $) I want to build my own mmp baseboard with minimal functional design.
The mmp comes with soldered memory on board, additional plugs for USB-3 and GigEthernet.
JTAG, PDC lines and io lines are distributed to plugs on the lower side of the pcb. All sense lines are distributed to an different plug.
My idea is to put on one baseboard in the size of an full pci card 4 mmps + power + digilent usb-jtag
connector + uart cp120x chip for simple communication with the fpgas.
I would like to give every mmp there own DC-DC converter for Vcc up to 20 A @ 1V small adjustable with sense support, and all the rest of the needed voltages by one DC-DC converter (I/O, memory, Digilent, UART, ...)
To save my time I would like to use finished moduls e.g. D12F200A or something else.
because of the low price of AVNets Kintex-7 325 Evaluation MMP module (est. 890 $) but the high price of the needed base board (500$) + the to less Vcc distributed current (6A) and high price pdc (300 $) I want to build my own mmp baseboard with minimal functional design.
The mmp comes with soldered memory on board, additional plugs for USB-3 and GigEthernet.
JTAG, PDC lines and io lines are distributed to plugs on the lower side of the pcb. All sense lines are distributed to an different plug.
My idea is to put on one baseboard in the size of an full pci card 4 mmps + power + digilent usb-jtag
connector + uart cp120x chip for simple communication with the fpgas.
I would like to give every mmp there own DC-DC converter for Vcc up to 20 A @ 1V small adjustable with sense support, and all the rest of the needed voltages by one DC-DC converter (I/O, memory, Digilent, UART, ...)
To save my time I would like to use finished moduls e.g. D12F200A or something else.
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