Topic: [CANCELLED] Project Caterpillar - Open Source 3RU DIY ASIC Miner (Read 17443 times)

Thanks for the kind words everyone, gives me some hope that the Bitcoin community isn't all scammers

And yes, I have learnt a lot from this. I've now aquired some BitFury sample chips, so I will likely be proceeding with a design based around that chip instead. At this point I'm thinking of a PCIe card with 4 or 8 chips. Still fleshing the idea out though.

Sad, and angered for you.   

Onwards, and upwards dude.

Sad. Your work and effort is not wasted as you have gained useful knowledge which you can apply elsewhere. Thank you for keeping us updated.

Thanks anyway dude, for the great efforts!

Sorry for the loss of this project. Avalon killed another one.

Sorry to hear it didn't work out, and good on ya for releasing the design info on github.

I hope so as well, the Avalon delays are making the DIY climate a challenge to say the least.
That said your efforts were and are appreciated even given the outcome if you ever start another project I will be watching.

Thanks. It really was a hard decision to make for me, I've invested quite a lot of time into this - that's the reason I want to get one board working.

Hopefully Bkk and burnin have better luck...

Well thanks for your efforts

Update 16th August 2013: The Caterpillar team have had a meeting and in light of the currently exponential increase in network difficulty and the continual delays regarding the Avalon chips come to the conclusion that it will not be possible to ROI with the Avalon chips, and have hence decided to cancel our project based around these chips.

This decision was not taken lightly and it was with a deep regret that this decision was reached. I currently have the components to build a single board with 7 chips and will be looking for 1 more sample chip, if anyone has one, so that I can build one board with 8 chips to prove that the design works. Once this has been completed I'll upload my design files to github under an open hardware license and will not be touching anything Avalon in the future.

Sorry for the delay in replying here Blisk, I thought I had!

Like everyone else at the moment, we're waiting for the Avalon chips to arrive.

how far are you now with this project?

I have updated the design schematic at http://cryptominer.org/static-media/caterpillar/caterpillar-asic-miner-schematic.pdf to use the Texas Instruments TPS53353 buck regulator instead of the IR3895.

The TPS53353 is a higher current device (at 20A instead of 16A) and is easier to lay out. It is also available, which is rather important! The extra current means that at stock we should have a headroom of around 30% of the max rated current, which will allow a bit of overclocking if the thermal side of things turns out ok.

Ok if that is possible, than please if you can do one for me?

Ahh, yeah, that should be possible.

I didn't mean assembled board, but empty board.
Ok I will check your progress.

At the moment, we have no plans on selling assembled boards, although that could be an option if there is enough interest. Check back with us once we get closer to being ready.

Yes I know the system. I think I can manage to put a board into factory where they have industrial soldering if I needed. because chips can be quickly dead if there is too hot.

Is there possible to get a board if you will do it for you to get one more for me I will pay for it?
I think there is for start better more testing to find out bugs, what you think?
If we can talk about it will be better on privat!

I plan on having the board design completed in the next week or so and then the boards should take another week or so to be manufactured. While the boards are being manufactured we will be sourcing components and the server equipment. The goal is to have the system online and hashing before the end of August.

It is very possible to do reflow smd soldering at home. I'll be using the method outlined here: http://www.ahars.com.au/htm/hb_reflowsoldering.html

I use to work alot with electronics and assembling boards when I maded a board by myself, but not with smd chips.
And ironing asic chips is not possible to a board at home because they have pins at the bottom.
So that's why I asked. But still If I get a board I can put all parts on it, it takes time but still.
Here is just a question of time. If you assemble this board at the end of the year it is question how much of bitcoin you can make it?
Or you can do it now?

I'll be getting the boards themselves manufactured for me and we haven't decided on the assembly part yet. I'll probably assemble the first one myself so I can test everything is ok before getting an assembler to put the remaining boards together.

If there's anyone lurking who does assembly, I'd love to hear from you.

Do you plan to make the board by yourself or it will be maded fro you?

I've started working on the PCB layout, primarily to ensure that I should have space for everything within the constraints we've set, and so far it's looking good:

Top layer (light brown) is high current 1.2V supply (3x rails)
Layer 2 (medium brown) is low current PLL 1.2V supply (2x rails)
Layer 3 (very dark brown) is signals (currently only CONFIG lines are drawn) and 3.3V rail.
Bottom Layer (blue) is ground

The CONFIG lines are length matched to less than 0.1mm. I'm still verifying footprints for other other components, so the layout may need to change slightly as I go through it.

nice work! amazing project here, like it!

regards

Hi All,

Thanks for your patience, I've finally found time to update the information on our website at http://cryptominer.org/caterpillar/, so there has been a fairly big update to the tray schematic and block diagram. I've also updated the wording on the page to reflect the design changes that have been made.

The schematic incorporates the changes that have been made to the result capture part of the circuit on the Klondike project. As a reminder, the Caterpillar is now based on the Klondike16, but (primarily) changes the analog temperature sensor for 6x I2C sensors and obviously has a different physical layout to suit our mounting requirements.

I'm now in the middle of verifying part numbers for everything in the schematic and making sure they have footprints, etc, before getting stuck into the PCB layout.

Sorry, yes I have been working on this but haven't had time for updates. I'll try to get the updates posted on the website soon.

The backplane will only be connected using the Molex 8981 connectors, so we have 12v and 5v available.

I have chosen the TI TUSB2046B USB hub IC, which is a 3v3 volt part. The PIC also runs off 3.3v, so I need to take 3v3 onto each tray. Due to the fairly low power requirements on the 3v3 bus, the 3v3 regulator will be on the backplane.

Any updates?

Any updates with this?

Also does your backplane diagram indicate that the USB hub will run off 3.3 volts? Because USB power is 5 volts.

Is a 3.3 volt reg really required? You could have 12 v, 5 v, and 3.3 v rails from any ATX PSU.

n1!
keep up the good work and i hope we get results from you very soon!

As stripykitteh mentioned, I have received the first sample chip:



These things are TINY! It's hard to believe that that tiny chip can pull almost the full legal current from a USB port just by itself!

We received a sample Avalon chip from SebastianJu on Tuesday. A pic will be uploaded tonight.

Meanwhile, we are also starting an Australian GroupBuy of the ASICMINER USB sticks. Head over here to check it out:

https://bitcointalk.org/index.php?topic=244263.new

Great work guys very interested will follow your progress closely! 

http://en.wikipedia.org/wiki/Open-source_hardware

Previous hardware I have designed for amateur radio and the rPi has been released under the CERN Open Hardware Licence. We (the Caterpillar team) haven't specifically decided on a license, but that will likely be it.

Good question ... a case design is not quite 'source' in terms of source code ... but I guess the true source (the idea) is open and not protected by some legal copyright scum

.... just bending words 

Would Open Source be good enough?

Imagine a (19" rackable 4 U) case incl. dual power supplies with your controllers as a standard and all the ASIC boards which can be switched in and out without a fuzz ... for replacement or upgrade .... that would be ultra sweet ... design one and make it public domain. Please! 

As a clarification though, we are looking at the BitFury chips as well, as stripykitteh posted above, as that seems to be a very promising development at the moment.

Our design is modular, so we can switch out the actual ASICs as required on a tray by tray basis - there's nothing stopping a 24 bay chassis from have 12 Avalons and 12 BitFury trays.

To be honest, haven't even looked at their chips. I just figured that they'd ship sometime in 2015 and there isn't any point.

They have a huge backlog of miner orders, so either the chips are ones that failed QA and hence not good enough for their own use (yes, I do realise they have graded them based on the number of working cores) or they are selling chips that should be going into their own miners - that's gotta be a customer service nightmare.


heh, ah, the more the merrier

+1 .... NOT another Avalon based miner ... 

I have been following that topic closely. Seems promising. Any thoughts on adopting BFL chips? They finally seem to be dropping prices to an acceptable level.

For those who were wondering, Bitfury did not get hold of his chips in time to win the bet he had, so the need to distribute them for alpha-testing has passed. So we won't be getting any cool bleeding-edge hardware from him this week.

Not to worry, he has commenced testing the chips himself and the early results seem promising, though it is too early to say whether they are ready to go to full production. You can see the latest here:

https://bitcointalksearch.org/topic/ann-bitfury-is-looking-for-alpha-testers-of-first-chips-free-money-here-228677

If his chips test out we will certainly investigate obtaining a supply of them to work with.

Keep up the great work and... keep us posted

Watching as well........... and a bit excited because I'm in Adelaide too :-)

watching...

Update 14th June:

Due to the fact that sample chips are now shipping and that we still have lots of unknowns in regards to the CPLD, we have decided to re-base the Caterpillar design on the Klondike16 design. This will result in both a simpler and cheaper design. It will also mean that we don't need to work on updating the miner software as well, if it works with the Klondike it should work with the Caterpillar too.

Our design will still be based on our own PCB layout to suit the drive trays, but we will be dropping the USB controller, ATMega microcontroller and CPLD design in favour of the simpler PIC design from the Klondike. We plan on using a modified version of BkkCoin's firmware image, with the changes being:

• 12 ASICs per bus
• I²C temperature sensors
• No I²C stacking of multiple boards

Dan is going to work on an updated block diagram which I'll upload to the website once it is ready.

stripykitteh has done this. Thanks.


If anyone else is able to pledge support for us, we'd greatly appreciate it!

Cross-post in all threads of projects that are registered for Avalon sample chips from my order.

Delivery of sample chips seems to have started.

If you have chips ordered with me that you want to support this project with, do it now.

If you are the owner of this project, please provide me your shipping address.


Find the details here.

[IMPORTANT UPDATE]

As an update, we have applied here to be an alpha-tester for bitfury's newly fabbed 65nm chips:

https://bitcointalksearch.org/topic/m.2407907

This is an exciting development for us, especially as like everyone else we are waiting on Avalon chip samples from zefir (we have chips in zefir batches #2 and #4, and more chips in SebastianJu's batch #2).

I (stripykitteh) have been following Bitfury's progress over the last couple of months and I have increasing confidence that his chips will work and set new performance benchmarks in SHA256 ASICs; in fact I've pre-ordered one of the 120GH/s miners metabank.ru from BitCentury (I ordered one within a few hours of their thread going up):

https://bitcointalksearch.org/topic/bitcentury-metabank-120gh-65nm-pre-order-proxy-closed-226846

Bitfury may independently decide who to allocate chips to; however he has raised the possibility of a forum poll to decide. If the poll eventuates we will definitely post instructions on how to find the poll and vote for us.  

At this stage if we do obtain bitfury's chips, after we participate in the alpha testing program we would adapt them into our 'larvae' trays, probably either 8 or 16 4 chips per tray (20GH/s per tray). A fully populated 3RU miner could do 320GH/s; which is certainly impressive by today's standards. Daemondazz has already taken a preliminary look at bitfury's specs and expects we can simplify the tray design a fair bit (no CPLD required). We'd need a 500MHz clock instead of 32MHz, but apart from that we can't foresee any new technical hurdles to leap.

Looking good.. I'll be a customoer

Thanks. I read the thread and found what you mentioned. Seems a poor way to cool the chip but maybe they also didn't built the cooling into the PCB thing that well one could say, by looking at the temperatures posted by users.

Here is hoping you can come up with something better

Updated first post. PDF of the ASIC part of the schematic has been uploaded to the website. It's still pretty rough, ie, the components have not been numbered as yet and won't be until the rest of the tray schematic is complete.

Thanks for the link, I'll have a browse through that thread shortly.


Yep, should be delicious!

Sample Avalon 'chip' received 

http://imgur.com/a/3MWlF

I wonder if some of those guys could help: https://bitcointalksearch.org/topic/official-open-source-fpga-bitcoin-miner-last-update-april-14th-2013-9047 - might be worth posting a note there

Updated the first post with the project website link and also a call for assistance from someone experience with FPGAs or CPLDs.

Yes, we are currently trying to figure out a good choice for the CPLD. The trick will be to find something with enough gates for the logic, that is still cheaper than an FPGA.

Nice!
I like the idea of using a CPLD for the Avalon protocol interface.

By the way, thanks to @dancoin for the Visio diagrams.

There is an air-gap inside the chip packaging, so heatsinks on top will not provide any benefit, and according to Avalon will actually reduce the cooling performace. There is a thermal pad underneath the chip, which gets soldered to the PCB along with the contacts and then vias conduct the heat through the board to the heatsink on the opposite site. There's quite a reasonable discussion BkkCoin's Klondike thread about this.

We definitely plan on applying thermal paste correctly

Hi,

Can I leave a suggestion to better optimize the cooling design compared to Avalon's boards?

I'm not very familiar with the packaging used on the chips but usually if they are not flipped chip, like BFL ASIC, you can still cool them better by having the heatsinks on top of the chips instead of cooling through the PCB. For instance:

https://bitcointalksearch.org/topic/avalon-recondition-212090

In this thread one can see the Avalon's cooling system wasn't exactly well applied (I would call it a disgrace) and improving the thermal transfer yielded no more than a couple of ºC improvement - the PCB can only transmit enough heat.

There seems to be some amount of disinformation on the thread about what temps the chips can withstand, quoting Yufi Guo at 100ºC. This is nonsense. The chips can and will work at that temperature but the metal fatigue will be very high and the chips will no doubt fail a lot sooner than they are expected to. Then there's problems like thermal cycles in lead free solder which compound or may be the may cause of problems.

Hope to keep hearing back from this project. Very interested in rack mount devices.

visio versions of the backplane and tray diagrams have been updated on the site:

Thanks!

I'll PM you the vector if you want to use it.

Simple, but very cool! I like it.

very interested in your 108GH/s unit.

watching

Who needs a logo? 

http://i.imgur.com/Yc164xB.png

Ok, a mate that's a bit better at Visio than I am will spend some time on the diagrams tonight or tomorrow.

My 7 year old being able to draw better than my is irrelevant :p

At this stage I'm just trying to get some information posted, I'll worry about cleaning it up once the schematics and pcb design is well underway.

Thanks for the feedback though, it is appreciated and has been noted!

I would suggest to use are more readable font, no baby-blue background and
pleeeeeeasee use software to draw some nice images for your diagrams
... this looks like an art project of an 7 year old otherwise ;-)

I have started a web page and loaded some basic information at http://cryptominer.org/caterpillar/

This seems like a great project. Good luck with it

I've drawn up the block diagrams of the tray and backplane and will get them online shortly. I've spent the weekend (between children's birthday parties and stuff) crash-learning about CPLDs to work out if they will be suitable for handling the communication with the ASICs.

Diagrams and things will be posted on cryptominer.org once I get a moment.

Thanks for following!

any updates?

OK, to post an update, I don't have a lot entered into the computer as yet - I'm still planning out a lot of this, but:

I've pretty much settled on the Norco RPC-3016/3116 case for the initial unit. Need to aquire the chassis so I can check the backplane will be suitable however. I already have an RPC-4120, so I like their cases.

The backplane will be a pure USB data and power distribution backplane. Each miner tray (a larvae) will include the voltage regulation from 12v and microcontroller for the 24 chips on that tray. The board will be 'upside down' in the tray, with the ASICs and most of the SMT components on the bottom and the heatsink and inductors/electrolytic caps on the top.

I'm planning on using a PCIe4x connector on the backplane and a straight card edge contact on the larvae. Each PCIe pin can do 1.1A, so with 50W@12v being 4A, I plan on using about 10 contacts for the 12V power rail so each pin is well under 0.5A.

I've found a suitable copper heatsink - HP c-Class Blade CPU heatsinks which can dissipate the heat from a 120W CPU with the forced air cooling in the HP BladeSystem chassis. Our airflow likely won't be as good as that, but we should still have decent airflow.

I've started work on creating a specification for the location of the connectors (similar to how SATA is a spec) so that it should be possible to put the larvae into any hotswap bay, assuming a suitable backplane is created.

All of the design files will be loaded onto GitHub once I actually get them typed up.

Oh, and 100th post 

This sounds like an interesting project. Would definitely be interested in watching your progress on this.

Good luck

It's probably worth updating the top post to make it clear that one of the design assumptions is good ambient temperature such as in a data centre.

Thanks, it was quite deliberate

Now we just need to prove it.

love the name!

Heh, perhaps

One of the biggest unknowns at the moment is the heatsink, I'm trying to find one that has a base about 6-7mm thick and fins about 15mm high that has a themal resistance <1C/W. If we can find something to fit those requirements, I dont think it will be a large issue - this is for hosting in a data centre (so good ambient temperature) and each tray would only get up to around 60-70 degrees. With good airflow in the chassis, it should be managable.

Fill the case with mineral oil and add a pump + radiator

That's a lot of heat in a small box. Are you sure you can cool that good enough?

You're pretty much on the money - the joke was we'd build something that would be ready before a butterfly.

As dd said, we are intending to build something for our own use. We decided to announce the project and make our work open-source to see if there are any others interested in building something higher density, that can leverage the utility of a 3 RU case. The modular design would mean that anyone wanting to copy what we do could easily produce a 27 GH/s model using 4 drive bays, for example.

The design would be hot-swappable making for ease of maintenance and expansion.

As mentioned, at this stage we're not planning on selling, although if there is demand that could be an option - this is initially for our own use.

We have a lot left to finalise yet. We're planning on making it modular and starting with a small number of trays (like 4 or so) and expanding it as the design is proven. We have ordered enough ASICs to fully populate one Caterpiller so we can ramp up quickly.

the metamorphosis of BTC from a caterpillar to a butterfly?

also, i think aiming for a rack unit is not the way to go. Bring a smaller 20 Ghash unit to market and it will sell better, be a more appropriate "version 1.0", and pave the way for putting a more concentrated and knowledged effort into a 3RU system after

I am also involved to a degree in this project.

A virtual bun for whoever can work out the inspiration for the project name!

Project: Caterpillar
Website: http://cryptominer.org/caterpillar/

---

Update 16th August 2013: The Caterpillar team have had a meeting and in light of the currently exponential increase in network difficulty and the continual delays regarding the Avalon chips come to the conclusion that it will not be possible to ROI with the Avalon chips, and have hence decided to cancel our project based around these chips.

This decision was not taken lightly and it was with a deep regret that this decision was reached. I currently have the components to build a single board with 7 chips and will be looking for 1 more sample chip, if anyone has one, so that I can build one board with 8 chips to prove that the design works. Once this has been completed I'll upload my design files to github under an open hardware license and will not be touching anything Avalon in the future.

---

The Caterpillar is a modular Avalon ASIC miner based on the Klondike16 project that is designed to fit into a rack mount server case using the drive bays as carriers. It is being designed by a group in Adelaide, South Australia who plan to form a small mining company. At this stage we will not be taking any orders for completed hardware, although we may be able to provide unpopualated PCBs for a small fee.

We are also investigating the feasibility of building a tray around the BitFury ASICs when they become available. More updates will be posted once details become available.

The people involved in this project are:

• daemondazz
• stripykitteh
• dancoin

Version 1 Preliminary Specs:

• Norco RPC-3116 or RPC-3216 3RU rack mount server case
• 24 ASICs per tray
• 6 temperature sensors per tray (1 per 4 ASICs)
• 16 trays (384 ASICs) per chassis (approx 108GH/s in 3RU)
• Custom USB/power distribution backplane to replace SAS/SATA backplane

The design will be fully open source with all schematics, PCB layouts and BOM parts available.


Update 7/Jun - Schematics
I have uploaded a draft PDF of the ASIC component of the schematics to our website. Components have not been numbered yet, but it does show the values.

Update 14/Jun - Sample Chip
We have been sent 1 sample chip so far from SebastianJu's group buy batch 1. Thanks Sebastian!

Update 14/Jun - Design Change
The team here have decided to simplify the design dramatically, so we're going to switch to a design that's very close to the BkkCoin's Klondike16 design. The plan is to use a customised version of his firmware. The changes from BkkCoin's ("reference") Klondike16 will be:

• 12 ASICs per bus instead of 8,
• No I²C for board stacking,
• 6x I²C temperature sensors instead of a single analog temperature sensor.

Update 16/Aug - Project Cancelled
The team have decided to cancel the development of this project and seek a refund of our pre-ordered Avalon chips. I (daemondazz) will complete a single board with 8 chips to prove the design but no futher work will be performed.