Topic: Design of ASIC (Read 349 times)

Hey all,

Since this is the newbie thread not sure what to expect from this but since this is where I can post this is where I am posting.

Currently I am working on my masters doing my thesis on VLSI (Very Large Scale Integration) layout.  This is done using a layout software (such as L-EDIT or CADENCE) to create a map of the physical structures to be made on silicon which will become the transistors/logic gates/amplifiers/circuits etc.  Currently I am working on an analog to digital converter.  I love circuits and enjoy laying out circuits. 

Honestly I have no idea what goes into the computations that a mining ASIC would need to do.  I know that they benefit from parallel hardware, but that even GPU's are not optimized for mining.  I am assuming that the actual circuits required would not be that complicated but rather just massively parallel in scope.  The computer science/algorithmic side of it is not my specialty, however, I can design circuits, lay them out, and simulate them.  To have them fabricated you just send them to the fab and pay a (quite sizeable) fee to have them construct the chips.  In .5um technology--500nm as opposed to Intel's 22nm-- it costs around $20,000 to have a chip fabricated and a few bucks for each chip after the first.

So, does anyone know the nuts and bolts of what an ASIC chip would actually have to do?