A dedicated ASIC will always beat an FPGAtoASIC unless you go one node lower.
FPGAtoASIC is faster and easier to develop, gets you out before the competition, but costs more per chip.
Just my suspicion. Not proof.
FPGAtoASIC is faster and easier to develop, gets you out before the competition, but costs more per chip.
Just my suspicion. Not proof.
I'm sure I read somewhere a while back that the KNC solution is an FPGA conversion, and that would fit with it's power consumption. Going to 20nm at this time is a mistake - the process isn't fully 'productionised' yet and might take another 6 months before yields are stable. the NRE is truly horrendous and same for the wafer costs. You always pay a premium for the newest process.
As a result, newer 28nm designs will easily beat their 20nm one in cost efficiency but since they've already sold a ton of them, I doubt very much that they'll care. Their customers might though.
