Topic: DIY PCB project: Dynamine D20 (Read 1614 times)
Despite there are some issues with delivery and so on, there will be people buying new generation Avalon ICs as they are going to be on the market. I don't know any alternatives where the date of delivery is deterministic...
Good luck with those chips.
Betting there will be better options that actually deliver on time. Not worth the risk.
Better to boycott Avalon not worth the hassles.
Betting there will be better options that actually deliver on time. Not worth the risk.
Better to boycott Avalon not worth the hassles.
Everything about Avalon Gen2 chips is speculation at the moment even if there will be a second Gen, but Avalon has announced a new generation with slight changes on pin configuration.
It says:
"This 55nm will retain the same physical dimension as the 110nm Gen1, only few pads were changed so getting them up and running requires very little change to existing design."
So it looks it will use same voltage, same IO protocol and will very likely have a PLL again, as this is state of the art. A programmable difficulty setting would require a more complicated on-chip proof-of-work logic. They will use the die space for hashing cores instead, as they also did with pre-calc of hash-data segment in Gen1.
It says:
"This 55nm will retain the same physical dimension as the 110nm Gen1, only few pads were changed so getting them up and running requires very little change to existing design."
So it looks it will use same voltage, same IO protocol and will very likely have a PLL again, as this is state of the art. A programmable difficulty setting would require a more complicated on-chip proof-of-work logic. They will use the die space for hashing cores instead, as they also did with pre-calc of hash-data segment in Gen1.
D you have any idea of the Avalon gen2 chips specifications?
Do you think Avalon is going to release chip specs to DIY community?
What's your guess on Core voltage, I/O voltage & protocol, internal PLL like the last chip, maybe a programmable difficulty setting?
Do you think Avalon is going to release chip specs to DIY community?
What's your guess on Core voltage, I/O voltage & protocol, internal PLL like the last chip, maybe a programmable difficulty setting?
n1 man, thanks for finishing the project and making it open source! Its a good thing to have more alternatives here.
Keep the good work up!
Keep the good work up!
DIY PCB Project "Dynamine D10/20"
Purpose:
This thread is intended for the development of (yet another) Avalon miner project which i will make open source after i have built and proven at least one unit.
Miner Description:
* Double Bank hashing, assembly of 10/20 ASICs per board
* Hashing speed: 2.8/5.5 Gh/s, overclocking possible
* USB interface
* Software adjustable over/underclocking
* Software adjustable over/undervolting in steps of ~5mV
* Onboard temperature sensor and fan regulator
* Dual, accurate onboard DC/DC switching regulator up to 80A
* Inter-Module communication via I2C bus or backplane board(...avoids power cable assembly)
* large (but cheap) active cooled heatsink
* Board dimensions: 135mm x 80mm
This project design focuses on a cheap but highly adjustable miner solution for use with AVALON SHA256 processors.
The board will connect to a cgminer capable host controller via USB. Six boards (a rig), can be chained together via I2C or backplane(PCIe) and mounted
on a solid 500mm x 125mm active cooled heatsink, which will lead to good heat dissipation on overclocking.
Several rigs can be stacked up via distance holders for a compact chip/space ratio and excessive hashing power with less components.
The board gerbers, BOM etc. will be provided open source, a preprogrammed microprocessor may be obtained for a small fee.
(This is my revenue on this highly time consuming project)
The board design is pretty much finished. Components and concept have been proven via protoboards and hashing has been tested with 4 Avalon ASICS.
(...thanks to SebastianJU for developer samples)
The project is currently in the stage of active development. Due to BitSynComs announcements for a new ASIC generation, this design mainly focuses
on Avalon Gen2/3 as Gen1 seems to be outdated before shipping. However, the first generation of the board will be designed for and tested with Gen1
Avalons from SebastianJU's Batch 5 and 6 and a full 120 chip miner will be built. (...didn't have enough BTCs to do some earlier batch orders)
Dynamine D20 single PCB:
6x Dynamine D20 on active heatsink(top view):
6x Dynamine D20 on active heatsink(bottom view):
I will keep posting more information as the project progresses. Suggestions and comments are welcome.
Funding: Sending some small donations would be very helpful and greatly appreciated: 1KSgRTMWb1drrWu6kZ3qQJPugBNBSTWwhP
Donations will cover initial PCB and component costs as well as license fees for software/firmware development tools.
Purpose:
This thread is intended for the development of (yet another) Avalon miner project which i will make open source after i have built and proven at least one unit.
Miner Description:
* Double Bank hashing, assembly of 10/20 ASICs per board
* Hashing speed: 2.8/5.5 Gh/s, overclocking possible
* USB interface
* Software adjustable over/underclocking
* Software adjustable over/undervolting in steps of ~5mV
* Onboard temperature sensor and fan regulator
* Dual, accurate onboard DC/DC switching regulator up to 80A
* Inter-Module communication via I2C bus or backplane board(...avoids power cable assembly)
* large (but cheap) active cooled heatsink
* Board dimensions: 135mm x 80mm
This project design focuses on a cheap but highly adjustable miner solution for use with AVALON SHA256 processors.
The board will connect to a cgminer capable host controller via USB. Six boards (a rig), can be chained together via I2C or backplane(PCIe) and mounted
on a solid 500mm x 125mm active cooled heatsink, which will lead to good heat dissipation on overclocking.
Several rigs can be stacked up via distance holders for a compact chip/space ratio and excessive hashing power with less components.
The board gerbers, BOM etc. will be provided open source, a preprogrammed microprocessor may be obtained for a small fee.
(This is my revenue on this highly time consuming project)
The board design is pretty much finished. Components and concept have been proven via protoboards and hashing has been tested with 4 Avalon ASICS.
(...thanks to SebastianJU for developer samples)
The project is currently in the stage of active development. Due to BitSynComs announcements for a new ASIC generation, this design mainly focuses
on Avalon Gen2/3 as Gen1 seems to be outdated before shipping. However, the first generation of the board will be designed for and tested with Gen1
Avalons from SebastianJU's Batch 5 and 6 and a full 120 chip miner will be built. (...didn't have enough BTCs to do some earlier batch orders)
Dynamine D20 single PCB:
6x Dynamine D20 on active heatsink(top view):
6x Dynamine D20 on active heatsink(bottom view):
I will keep posting more information as the project progresses. Suggestions and comments are welcome.
Funding: Sending some small donations would be very helpful and greatly appreciated: 1KSgRTMWb1drrWu6kZ3qQJPugBNBSTWwhP
Donations will cover initial PCB and component costs as well as license fees for software/firmware development tools.
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