That's why I say they are randomly serialised. Today we have a sequence of 2 SHA256 hashes in a row to attempt a block solution, and the ASIC chips are (I believe) designed to perform 2 sequential such hashes only. With the proposed change, a series of 10 or more different hash functions would be used for a single POW calculation, and the combination of hash functions would be changed periodically, like difficulty or block reward adjustments are made now. Meni's original proposal suggested 100 different hash algorithms and 10 functions per series. Making ASICs to account for all possible function combinations ought to be prohibitively expensive, and even if not, just find the point where it is not economical.