RamirezX hi,
If you take this FPGA thing seriously, I think it is better to swich use of FPGAs to SHA1 salted hashing (for nokia SL3 decoding).
There is still a lot of work on that, and there is no commercial software developed for them.
It is somehow related to sha256 but simplified.
Please if you are interested, contact me regarding this project.
Topic: DYI: Avalon controller (Read 1517 times)
If I see right, each hashing module in reference design got 20pin (10x2) header. Most of pins are connected to Vcc and GND. The most interesting signals are two diferential pairs config and report. Chips on hashing module are connected serial on config, and parallel on report. And it's I wanna try to connect to FPGA's IO in the first step with single chip or couple of chips. Of course I have to connect Vcc, GND and CLK to chip.
The next step may be a simple reduction between FPGA-based machine and reference design's hashing module, or another hashing module.
The next step may be a simple reduction between FPGA-based machine and reference design's hashing module, or another hashing module.
How do you want to connect the modules to that board? Each module got a 24 pin ribbon cable.
Project: Avalon controller
Hi, I'm sw developer and hw hobbyist.
I started working on avalon controller, based on existing FPGA-based mining machines, which become unusable for bitcoin mining in near future.
Some of them are designed as development boards, so they have FPGA's IOs achievable.
I want to use FPGA-based machine as completed avalon chip controller.
The main work is to create FPGA's bitstream, which isn't opensource this moment in Avalon's reference design.
Features:
- Opensource
- Direct USB connection
- Modularity - Can operate up to 16 hashing boards simultaneously ( ... or more, depends on available IO's)
- Easy update via JTAG
Please note, this is my free-time project so if someone wants to support this project may send me some coins .)
Thanks.
Donation Address BTC: 1D9qCCQUykPo8hZZd1bFxC1PRg3sjiQSqS
Hi, I'm sw developer and hw hobbyist.
I started working on avalon controller, based on existing FPGA-based mining machines, which become unusable for bitcoin mining in near future.
Some of them are designed as development boards, so they have FPGA's IOs achievable.
I want to use FPGA-based machine as completed avalon chip controller.
The main work is to create FPGA's bitstream, which isn't opensource this moment in Avalon's reference design.
Features:
- Opensource
- Direct USB connection
- Modularity - Can operate up to 16 hashing boards simultaneously ( ... or more, depends on available IO's)
- Easy update via JTAG
Please note, this is my free-time project so if someone wants to support this project may send me some coins .)
Thanks.
Donation Address BTC: 1D9qCCQUykPo8hZZd1bFxC1PRg3sjiQSqS
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