Topic: FPGA ethereum miner (Read 472 times)
any update on this?
Also, would adding more ram increase the memory bandwidth or is the amount insignificant?
Ok I'm working on one now (just building out the schematics and deciding about how I'm going to go about doing this). I just need a bit of a helping hand from the community 
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So I'm assuming that those who are reading this understand ethash's mixing function and how each node has to retrieve DAG pages from a pseudorandom dataset (64 times) that then have to be either, below or equal to the target threshold once it has been digested back down to 32 bytes via the post processing function. You can look this up if you need more info...
Well, based on my research thus far, there are 3 main steps to achieve this;
1) Improve the computational power of the FPGA so that it can perform the mixing function faster than current GPU's (albeit this improvement would be relatively insignificant).
2) Improve the bandwidth of the FPGA so that it is significantly larger/faster than current GPU's. This will allow for the FPGA to retrieve DAG files from the pseudorandom dataset at a much higher speed. (This improvement would have a huge impact!)
3) Make the cost of $/hash much cheaper.
So as we can see, the step in which we have the most control is step 2. So thats what I thought I would focus on. Currently, my Nvidia 1070 has one GDDR5 chip which is significantly slower at fetching small chunks of data when compared to a DDR4 or a DDR3. So if we added several DDR4/3 chips to the FPGA board, bandwidth would be increased by a vast amount, therby allowing for DAG pages to be fetched at a much greater speed. <-- Please let me know if this is wrong!
Cost: DDR4; $35 - $70
FPGA boards; $20 - $170
If we configure the FPGA board like this then we could get roughly double (or much more) the $/hash when compared to the GPU's currently on the market (September 2017). Please let me know if I have missed anything or could change/add anything to make this possible or better. Hopefully, as a community, we can be one of the first to develop a specialised chip for ethash or other DAG based algorithms.
.So I'm assuming that those who are reading this understand ethash's mixing function and how each node has to retrieve DAG pages from a pseudorandom dataset (64 times) that then have to be either, below or equal to the target threshold once it has been digested back down to 32 bytes via the post processing function. You can look this up if you need more info...
Now to the good part! - How can we make a more efficient miner than
the current GPU's on the market today (by using a FPGA miner)?
the current GPU's on the market today (by using a FPGA miner)?
Well, based on my research thus far, there are 3 main steps to achieve this;
1) Improve the computational power of the FPGA so that it can perform the mixing function faster than current GPU's (albeit this improvement would be relatively insignificant).
2) Improve the bandwidth of the FPGA so that it is significantly larger/faster than current GPU's. This will allow for the FPGA to retrieve DAG files from the pseudorandom dataset at a much higher speed. (This improvement would have a huge impact!)
3) Make the cost of $/hash much cheaper.
So as we can see, the step in which we have the most control is step 2. So thats what I thought I would focus on. Currently, my Nvidia 1070 has one GDDR5 chip which is significantly slower at fetching small chunks of data when compared to a DDR4 or a DDR3. So if we added several DDR4/3 chips to the FPGA board, bandwidth would be increased by a vast amount, therby allowing for DAG pages to be fetched at a much greater speed. <-- Please let me know if this is wrong!
Cost: DDR4; $35 - $70
FPGA boards; $20 - $170
If we configure the FPGA board like this then we could get roughly double (or much more) the $/hash when compared to the GPU's currently on the market (September 2017). Please let me know if I have missed anything or could change/add anything to make this possible or better. Hopefully, as a community, we can be one of the first to develop a specialised chip for ethash or other DAG based algorithms.
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