The current ASIC generation uses chips with structure size 20nm. Is there already some outlook and roadmap for even finer structures?
For CPUs we have currently 22nm and the "roadmap" is something like 14nm in 2014, 10nm in 2015, 7nm in 2017 and 5nm in 2019.
Is there for ASIC mining chips a similar development expected?
For CPUs we have currently 22nm and the "roadmap" is something like 14nm in 2014, 10nm in 2015, 7nm in 2017 and 5nm in 2019.
Is there for ASIC mining chips a similar development expected?
Those "minimum feature size" numbers have long ceased to have any real physical meaning and are now just marketing terms for the "next generation" of fabrication process. Moore's law is just about on its last gasp (at least for traditional silicon) and the enormous cost of new fab plant is going to bring it to a crashing halt in the very near future.
Puts away xtal-ball, waits for howls of anguish. Its just my 2c anyway.
