Topic: Next generation ASIC design IP for sale (Read 664 times)
tldr, have paper plans for a chip, buy it from us. Sounds reasonable, but unless you're willing to insure the design and all costs involved proving that....
Have you taped out? Do you have a sample chip yet?
Based on what you said the answer is no, but just want to doublecheck.
Thanks
Based on what you said the answer is no, but just want to doublecheck.
Thanks
We have designed a next generation bitcoin mining solution and we are offering the IP (Intellectual Property) for sale. The design is currently running in System Verilog RTL and we have done a number of synthesis runs and power simulations to have a good feel for where our performance will lie:
These are of course preliminary and dependent on the foundry selection. We are assuming a 28nm fab. We can also change the number of cores to suit customer requirements.
We have done extensive research into how to minimize the power and reduce the combinatorial and sequential switching per cycle. The numbers we are quoting, we believe, are conservative and with some more effort we can reduce these numbers further. These numbers are nominal figures and are not representative of the values achievable from overclocking.
We have chosen a foundry partner and our estimates are based on using that foundry but we are open to go to any foundry that can support us.
As part of this IP sale we would expect to be involved all the way through the manufacturing cycle. In fact we are happy to entertain a number of engagement options from and outright sale, a partnership or using us as an OEM supplier.
We have over 30 calendar years of experience (not a collective number of years, that for us would be centuries) in ASIC design and have designed many very large ASICs for high performance computing.
We are interested in serious inquiries only. There are a number of other features that we have incorporated into our design that we believe will provide a significant gain over the competition. We will only discuss these under NDA (Non-disclosure Agreement) with parties we have screened.
- Performance ~256 GH/s per die
- Power < 32 Watts per die
- Price < $32 per die (packaged and tested)
- < $0.125 per GH/s
These are of course preliminary and dependent on the foundry selection. We are assuming a 28nm fab. We can also change the number of cores to suit customer requirements.
We have done extensive research into how to minimize the power and reduce the combinatorial and sequential switching per cycle. The numbers we are quoting, we believe, are conservative and with some more effort we can reduce these numbers further. These numbers are nominal figures and are not representative of the values achievable from overclocking.
We have chosen a foundry partner and our estimates are based on using that foundry but we are open to go to any foundry that can support us.
As part of this IP sale we would expect to be involved all the way through the manufacturing cycle. In fact we are happy to entertain a number of engagement options from and outright sale, a partnership or using us as an OEM supplier.
We have over 30 calendar years of experience (not a collective number of years, that for us would be centuries) in ASIC design and have designed many very large ASICs for high performance computing.
We are interested in serious inquiries only. There are a number of other features that we have incorporated into our design that we believe will provide a significant gain over the competition. We will only discuss these under NDA (Non-disclosure Agreement) with parties we have screened.
Jump to: