Author

Topic: speculation: Barry's SW+2MB compromise will preserve ASICBoost (Read 440 times)

hero member
Activity: 784
Merit: 1001
Turns out this topic is being discussed by jgarzic, gmaxwell and others here:

https://github.com/btc1/bitcoin/issues/8
hero member
Activity: 763
Merit: 500
dumb question - why can't everyone else use asicboost too and level the playing field? even if it's a bitmain chip only thing, there are enough bitmain machines out in the wild.

* It's not in the interest of everyone else, only in the interest of the miners
* there is a security advisory for this, so it's officially harmful
* Patents
* Bad precedent

legendary
Activity: 1288
Merit: 1087
dumb question - why can't everyone else use asicboost too and level the playing field? even if it's a bitmain chip only thing, there are enough bitmain machines out in the wild.
hero member
Activity: 784
Merit: 1001

I have been trying to determine whether the real compromise behind the SegWit2x Working Group (spearheaded by Barry Silbert, Jeff Garzic among others working on the code) has nothing to do with the 2MB blocksize increase, but is instead a compromise over ASICBoost. In other words: Core's version of SW destroys ASICBoost, which is the real reason why Jihan is against it. Jihan will support SW, but only if it preserves his ASICBoost advantage. And that's what the compromise is all about.

So my speculation is that the SegWit2x Working Group will devise code which, lo and behold, will be ASICBoost-friendly.

I hope I'm wrong, but I dunno yet. Looking for some solid info. Comments?
Jump to: