intel for example is near the 10nm in the next year they should present(icelake) something that run with that efficiency
Intel has announced a 10nm process they are working on - but they're having some major issues getting it to work at production-scale (and they have had major issues that are NOT all cured yet getting it to work at ALL even on lab scale).
If it does show up next year:
1) It will be Intel-specific - Intel doesn't share it's fabs with anyone else as they need all the capasity they have.
2) It probably will have the usual "low yield" issues of ANY new process for the first year or two. Possibly longer given all the issues they are having getting it to work at ALL.
3) It would probably not show up 'till very LATE next year, if at all.
One thing that is certain about it - it WILL be the last "pure silicon" process ever, according to both Intel and IBM "10nm is the end of the road for pure silicon" - and THAT change is going to make for a lot of infrastructure changes needed for future processes to ever achieve production.
I believe TSMC and GF have also both announced they are doing work on "next generation" fab processes - but very few details yet.
IBM has announced it's working on a 7nm process using a MIXED germanium/silicon wafer, but not much in the way of details yet, and it's estimated "soonest to production" timeframe is 2019 IIRC.
One other thing to keep in mind - there was a 22nm process around (Intel made their CPUs on it among other usage, and at least one other company probably TSMC also had at least one process at that feature size) - but it was very little more efficient than 28nm was despite the significant feature size shrink that SHOULD have made it ballpark 40% more efficient.
It's also interesting to note that 14/16nm is ALSO nowhere near as great an improvement in effficiency vs. 28nm as previous "half size" generations achieved - commonly when you drop the feature size in half the efficiency almost quadrupled, the current 14/16nm process only seems to offer somewhere between double and triple the efficiency.
Hello, quantum physics effects getting to be a MAJOR issue at current feature size, instead of just a minor but noticeable factor to be designed around in previous generations of semiconductor tech.