I was wondering the same, however from a different angle:
Will there be a super ASIC 2.0? With a similar gap like the one between FPGA and ASICs? Or do you predict there to be a much softer increase in efficiency (like the usual doubling in increase every 18 months)
Definitely not.Will there be a super ASIC 2.0? With a similar gap like the one between FPGA and ASICs? Or do you predict there to be a much softer increase in efficiency (like the usual doubling in increase every 18 months)
CPUs were general-purpose ASICs that used software to do hashing.
GPUs were the same, but were better for mining because of parallelization.
FPGAs were better because they could be programmed on the chip itself.
ASICs are the end. A Bitcoin ASIC can only do one thing: SHA256 hashing. The hardware is designed specifically to do only that. So there is nothing more to come.
ASICs are used in industry when a chip is needed to do just one thing really efficiently. Like the ASIC that does the switching in a high-performance networking switch.
Once we settle on the latest technology for ASICs, we are looking at nothing more than the improvement cycle of current CPUs. I suspect less, considering the simplicity of the units in the ASICs. Since they are so simple, I do not expect many performance increases based on changing the actual units. Just on process and materials. So something along the lines of AMD sticking with K10 for the next 10 years and just changing the process and materials and maybe using newer physical technologies as they come along, like tri-gate or finfet.
*disclaimer* - I am not a computer engineer. This is just what I think based on what I know.
I'm not thinking like a guy wondering what kind of technological improvements will cause $/THs to decrease, but someone guesstimating what kind of improvements experience will bring to first-time operators of ASIC companies.
