Dr David likes his privacy, so his name has been removed from the website.
I'm going to just preserve this here for future reference, so people won't need to dig through some archives or caches.
Cointerra/Team
Cointerra boasts a highly experienced engineering team of semiconductor architects and designers who have previously designed some of the world’s highest performance CPUs, GPUs and chipsets for Nvidia, Intel, Samsung, Qualcomm and Nortel. Having worked on several generations of low-power mobile devices, our team brings tremendous experience in power efficient circuitry, design methodology and implementation to the exciting new frontier of Bitcoin mining.
Executive team
The architecture, design and development effort is lead by : Ravi Iyengar,
Dr. David Tannenbaum, and Jim O’Connor. The Advisory Board is headed by Dr. Naveed Sherwani.
Ravi Iyengar
FOUNDER & CEO
http://www.linkedin.com/in/ravidiyengarBefore founding Cointerra, Ravi was a Lead CPU Architect at Samsung Corporation. Ravi brings with him 15 years of industry experience in Architecture, Design and Verification in CPU, GPU, Desktop/Server Chipsets and ASIC Cores, and years of leadership experience in top Semi-conductor companies like Samsung, Qualcomm, NVIDIA, and Intel. Ravi has a Master’s Degree in Computer Engineering from Wright State University and a Bachelor’s Degree in Electrical Engineering from National Institute of Technology, India.
Dr. David TannenbaumChief Architect
http://www.linkedin.com/pub/david-tannenbaum/12/4b6/647David works as a Consultant Architect & Designer at Cointerra. He is a Principal Engineer at NVIDIA Corporation and has over 25 years of experience in the industry. He brings with him vast experience in the design of arithmetic intensive logic including single, double precision floating-point, custom floating-point, IEEE formats, transcendental support, fused multiply-add, integer operations, conversions, logical operations, custom instructions, exponentiation, logarithms. Inventor on 20+ patents. David has a Ph.D in Electrical and Electronics Engineering from Rensselaer Polytechnic Institute.
Jim O’Connor
VP of Engineering
http://www.linkedin.com/in/jgoconnorOver 35 years of experience in design and management. Jim has held management positions at Altior Inc(now Exar), SMSC(now Microchip), iVivity, Zagros Networks and Orologic(now Vitesse Semiconductor), Nortel Semiconductor and BroadBand Technologies.
Jim has also held lead design positions at BroadBand Technologies, Star Technologies, General Electric, and Teledyne. His experience includes SOC design and verification, Assertion-Based Verification, physical design, systems design, software and firmware in graphics, datacom, telecom and security.
Jim is a graduate of General Electric’s Edison Engineering program and holds B.S. and M. Eng. Degrees in electrical engineering from the University of Louisville’s Speed Scientific School.
Dr. Naveed Sherwani
Advisor
http://www.linkedin.com/pub/naveed-sherwani/0/89/2a7http://en.wikipedia.org/wiki/Open-SiliconCo-Founder, President & CEO of Open Silicon. Prior to co-founding Open-Silicon, Dr. Sherwani was the founder and General Manager of Intel Microelectronics Services where he led efforts to promote the use of disciplined ASIC methodologies to improve design efficiency and time-to-market. He currently chairs the GSA (Global Semiconductor Association) Technical Steering Committee.
Dr. Sherwani co-architected the Intel microprocessor design methodology and environment that has been used in several leading microprocessors. Prior to joining Intel, he worked as a consultant for various telecommunications and computer companies, mainly focusing on ASIC design flow and cell library design to improve time-to-market.
Dr. Sherwani is the author of textbook on Physical Design, which is widely used as the main textbook at major universities around the world. In addition, he has authored or co-authored three books and over 100 articles on various aspects of Physical Design Automation and ASICs.
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