It looks like at higher frequencies the 7970 will win out in efficiency, but a 5970 putting out 550 MH/s is only running at about 500 MHz and 0.9 volts, so dynamic power usage must be at a sweet spot. Static power use of a semiconductor due to current leakage rises exponentially as the thickness of the insulators decrease, so as dies shrink, static power use can account for over 50% of a chips overall power usage.
I guess you can't write off the 5970s as long as you don't mind underclocking and undervolting.
Anyways, that's my analysis but take it with a grain of salt - I am an electrical engineer, but not a good one
Not to say that your analysis is worth less than mine, but I have taken several graduate-level courses in semiconductor device physics and very-large-scale-integrated circuit design.
Just so that we are clear with our definitions:
Static power is the power consumed by a CMOS transistor when it is "static" (ie not going from 1 to 0 and 0 to 1). Dynamic power is the power used by a CMOS transistor when switching from 0 to 1 or 1 to 0.
There is no "sweet spot" in dynamic power usage when you look at it from a pure computational efficiency stand-point. Lower voltage (so less current leaks when you switch states) and lower frequency (less capacitive effect) is always more efficient (at least, until you reach the threshold voltage, then the device just stops working).
While it is true that static power consumption maybe lower on the 40 nm node, the lower threshold voltage on the 28nm node means that the transistor spends less time in the dynamic power usage. Engineers optimize static power usage and dynamic power usage using a variety of techniques, which is beyond the scope of this discussion. However, for a properly optimized process (ie. something a company would put out), the amount of energy (ie the sum of the static energy and dynamic energy) to do one unit work of computation always decreases as you shrink in process node (otherwise, there is little reason to shrink process nodes given modern ASIC's thermal-limitation).