Ok, I have an official release here
https://github.com/pmumby/hashvoodoo-fpga-bitcoin-miner/downloads(you want the Aug 16th release)
That's the first officially "useful" release of the HashVoodoo bitstream for the CM1 boards.
It includes instructions, dipswitch diagrams, it's own controller (required), and files for flashing both via USB and via jtag/impact.
This one runs at 175Mhz, and is overclocked a bit. It's been tested fairly heavily at this point and is stable on both the current boards, and the pre-50 boards.
It does throw invalids (under 5%) on a couple chips at random, this is due to the overclock.
I should have a much improved clockrate bitstream very soon.
And yes we have thuroughly tested USB flashing of both the controller and the array fpgas. It works fine with this new controller, so you can downgrade just fine. It's been tested on several boards.
Here is the readme from the zip, please read it when you download it:
This bistream is now mining stable on all 4 slots on both the old (pre-50) and newer CM1 boards.
It should reach 175Mhash, with relatively low invalids. It is an overclock, so it does see some invalids, on the odd chip, but seems to behave exactly the
same on both old and new boards.
Right now this bitstream built with timing to meet 150Mhz, and I'm running it at 175Mhz, so it's a 25Mhz overclock.
My hope is to release another version very soon which meets much higher timing (at least 175Mhz - 180Mhz or maybe even higher) meaning 200+ should
be achievable with this soon.
This controller is new, and generates a 25Mhz comm clock, and a 25Mhz LVDS source clock, which is then stepped up. We'll be cleaning that up in a
future release, which may improve stability a little more due to less noise.
The LEDs on the array FPGAs work slightly differently on this bitstream:
RED: Heartbeat (clock blinker) blinks on a divider of the hashing clock
GREEN: Found Nonce (lights up and fades out)
BLUE: Serial Activity LED (lights on RX or TX)
AMBER: Idle, lights when the FPGA is not currently busy hashing.
The heartbeat will also light SOLID if the DCM has lost it's lock or the clock is somehow "invalid"
This release should work on any miner compatible with Icarus, you need to add all 4 serial ports as workers, at 115200 baud. Each worker should
independently pull 175MHash.
I do have my own fork of MPBM which has a customized Cairnsmore module, this module will report valid hash rates and statistics.
If you mine with another miner, you may not get valid hash rates (likely it will report exactly double)
My fork can be found here:
https://github.com/pmumby/Modular-Python-Bitcoin-Miner
(be sure to get the "testing" branch)
And use the glasswalker-cairnsmore module for your workers.
For Flashing:
I have included both the normal bit and the MCS file (for flashing the SPI in Impact) in this release.
Only the bit is included for the controller, as an MCS is not needed for it.
To flash via USB use the instructions provided by enterpoint. Attached is a JPG with the dip switch diagram, and here is a table of what the dip switches do:
SWITCH1 - Manual Reset when OFF (default is ON)
SWITCH2 - Override Fan Speed Sense when OFF (default is ON)
SWITCH3 - USB Programming Enable when OFF (default is ON)
SWITCH4 - MUST BE ON ALWAYS!
SWITCH5 - MUST BE ON ALWAYS!
SWITCH6 - Controller USB SPI Flash Enable when OFF (default is ON)
SWITCH7 - NOT USED CURRENTLY
SWITCH8 - JTAG Select (ON=Internal USB) (OFF=External JTAG)
For mining all switches should be in the ON state.
To flash via Xilinx ISE Impact with a supported JTAG cable:
Flash the controller first:
- Plug into controller jtag
- Let impact create a new file, and scan the jtag.
- It will identify the Spartan3, and prompt if you wish to pick a configuration file
- Choose the controller bit file.
- In the actions menu choose the option to program FLASH and FPGA.
Then do the array FPGAs:
- Plug into array jtag
- Let impact create a new file and scan the jtag
- when prompted, choose the hashvoodoo bit file for configuration file
- When prompted to add an SPI flash, say yes
- Choose the MCS file provided
- When prompted for the type of SPI PROM choose the M25P128
- Repeat for the other 3 chips
- When done a dialog with some settings will pop up, accept the defaults.
- Select one of the SPI Flash chips in the graphical display. It will turn green
- In the action menu choose Program.
- Repeat for the other chips. (no need to do the FPGAs themselves they program from the SPI on power cycle)
- Power cycle the board
Note, when flashing, there seems to be a stability benefit (not in hashing, but in flashing itself, to improve success rate) if you flash them in reverse order
(start with the 4th chip and work back to the first). Not sure why that is.
When done programming, please do a FULL power cycle of the board before mining with it.
Please share your results with this bitstream on the forums.
Upcoming features:
- Faster clock
- Less invalids
- Dynamic Clock Tuning (software can auto-adjust clock for best speed with minimal invalids)
Let me know how it works for you. I know this one isn't faster than the makomk 200, but it should be more stable on all boards (so your problem boards
should run this one just fine).
Expect a much faster version (200+) "Soon (tm)".
Please report any issues to the issue tracker on github and/or on IRC in #cm1 on freenode.
you are faster than light !!! 
