Topic: [CANCELLED] Project Caterpillar - Open Source 3RU DIY ASIC Miner - page 3. (Read 17420 times)

I have been following that topic closely. Seems promising. Any thoughts on adopting BFL chips? They finally seem to be dropping prices to an acceptable level.

For those who were wondering, Bitfury did not get hold of his chips in time to win the bet he had, so the need to distribute them for alpha-testing has passed. So we won't be getting any cool bleeding-edge hardware from him this week.

Not to worry, he has commenced testing the chips himself and the early results seem promising, though it is too early to say whether they are ready to go to full production. You can see the latest here:

https://bitcointalksearch.org/topic/ann-bitfury-is-looking-for-alpha-testers-of-first-chips-free-money-here-228677

If his chips test out we will certainly investigate obtaining a supply of them to work with.

Keep up the great work and... keep us posted

Watching as well........... and a bit excited because I'm in Adelaide too :-)

watching...

Update 14th June:

Due to the fact that sample chips are now shipping and that we still have lots of unknowns in regards to the CPLD, we have decided to re-base the Caterpillar design on the Klondike16 design. This will result in both a simpler and cheaper design. It will also mean that we don't need to work on updating the miner software as well, if it works with the Klondike it should work with the Caterpillar too.

Our design will still be based on our own PCB layout to suit the drive trays, but we will be dropping the USB controller, ATMega microcontroller and CPLD design in favour of the simpler PIC design from the Klondike. We plan on using a modified version of BkkCoin's firmware image, with the changes being:

• 12 ASICs per bus
• I²C temperature sensors
• No I²C stacking of multiple boards

Dan is going to work on an updated block diagram which I'll upload to the website once it is ready.

stripykitteh has done this. Thanks.


If anyone else is able to pledge support for us, we'd greatly appreciate it!

Cross-post in all threads of projects that are registered for Avalon sample chips from my order.

Delivery of sample chips seems to have started.

If you have chips ordered with me that you want to support this project with, do it now.

If you are the owner of this project, please provide me your shipping address.


Find the details here.

[IMPORTANT UPDATE]

As an update, we have applied here to be an alpha-tester for bitfury's newly fabbed 65nm chips:

https://bitcointalksearch.org/topic/m.2407907

This is an exciting development for us, especially as like everyone else we are waiting on Avalon chip samples from zefir (we have chips in zefir batches #2 and #4, and more chips in SebastianJu's batch #2).

I (stripykitteh) have been following Bitfury's progress over the last couple of months and I have increasing confidence that his chips will work and set new performance benchmarks in SHA256 ASICs; in fact I've pre-ordered one of the 120GH/s miners metabank.ru from BitCentury (I ordered one within a few hours of their thread going up):

https://bitcointalksearch.org/topic/bitcentury-metabank-120gh-65nm-pre-order-proxy-closed-226846

Bitfury may independently decide who to allocate chips to; however he has raised the possibility of a forum poll to decide. If the poll eventuates we will definitely post instructions on how to find the poll and vote for us.  

At this stage if we do obtain bitfury's chips, after we participate in the alpha testing program we would adapt them into our 'larvae' trays, probably either 8 or 16 4 chips per tray (20GH/s per tray). A fully populated 3RU miner could do 320GH/s; which is certainly impressive by today's standards. Daemondazz has already taken a preliminary look at bitfury's specs and expects we can simplify the tray design a fair bit (no CPLD required). We'd need a 500MHz clock instead of 32MHz, but apart from that we can't foresee any new technical hurdles to leap.

Looking good.. I'll be a customoer

Thanks. I read the thread and found what you mentioned. Seems a poor way to cool the chip but maybe they also didn't built the cooling into the PCB thing that well one could say, by looking at the temperatures posted by users.

Here is hoping you can come up with something better

Updated first post. PDF of the ASIC part of the schematic has been uploaded to the website. It's still pretty rough, ie, the components have not been numbered as yet and won't be until the rest of the tray schematic is complete.

Thanks for the link, I'll have a browse through that thread shortly.


Yep, should be delicious!

Sample Avalon 'chip' received 

http://imgur.com/a/3MWlF

I wonder if some of those guys could help: https://bitcointalksearch.org/topic/official-open-source-fpga-bitcoin-miner-last-update-april-14th-2013-9047 - might be worth posting a note there

Updated the first post with the project website link and also a call for assistance from someone experience with FPGAs or CPLDs.

Yes, we are currently trying to figure out a good choice for the CPLD. The trick will be to find something with enough gates for the logic, that is still cheaper than an FPGA.

Nice!
I like the idea of using a CPLD for the Avalon protocol interface.

By the way, thanks to @dancoin for the Visio diagrams.

There is an air-gap inside the chip packaging, so heatsinks on top will not provide any benefit, and according to Avalon will actually reduce the cooling performace. There is a thermal pad underneath the chip, which gets soldered to the PCB along with the contacts and then vias conduct the heat through the board to the heatsink on the opposite site. There's quite a reasonable discussion BkkCoin's Klondike thread about this.

We definitely plan on applying thermal paste correctly