5 million if you didn't screw up, and if you're lucky.
And if BFL already made this $5million dollar chip you are wasting all your money. Is why bitcoin died.
Topic: community asic project (Read 3538 times)
And if BFL already made this $5million dollar chip you are wasting all your money. Is why bitcoin died.
I really like your idea as some of my friends and me planned a similar crowd funding project...
If you're serious, we would like to contribute or join a community asic project.
In what part of the world are you located ?
Cheers, and don t let yourself fooled by others with the right people and spirit it is def. possible and it would contribute to the whole Bitcoin community...
With the avalon chip hitting the mass's sooner or late, I've been working on some PCB designs for them...
for this gen 2 asic design, for $5mil we could design/build a very fast chip, for $500k a slow chip :-) - but I don't think there is enough support to get this off the ground ATM
for this gen 2 asic design, for $5mil we could design/build a very fast chip, for $500k a slow chip :-) - but I don't think there is enough support to get this off the ground ATM
5 million if you didn't screw up, and if you're lucky.
I don't even know if the pooled resources among this forum would be able to develop the funds to get a new chip fabbed. That's the significant advantage those companies have over us obviously.
With the avalon chip hitting the mass's sooner or late, I've been working on some PCB designs for them...
for this gen 2 asic design, for $5mil we could design/build a very fast chip, for $500k a slow chip :-) - but I don't think there is enough support to get this off the ground ATM
for this gen 2 asic design, for $5mil we could design/build a very fast chip, for $500k a slow chip :-) - but I don't think there is enough support to get this off the ground ATM
See, while I enjoy the thought of that, I don't think there are too many EE's, excluding myself, on these forums.
I'm not trying to be a downer, and I want people to learn, but I just see a lot of people with no design experience, or even electronics experience throwing down tons of money to start a project they truly don't know how to start. Plus many of them think that it will be the same process as for a FPGA or that they can "use" the open source FPGA designs to begin their initial designs.
Again, not trying to be pessimistic. If you are dedicated and are willing to commit the time and effort to make the project work, and learn (quickly) along the way, you will do well.
We Engineers must unite in a thread or Google Hangout and share our ideas or something of the like and bring it back here to the forums. I think that would be effective.
I'm not trying to be a downer, and I want people to learn, but I just see a lot of people with no design experience, or even electronics experience throwing down tons of money to start a project they truly don't know how to start. Plus many of them think that it will be the same process as for a FPGA or that they can "use" the open source FPGA designs to begin their initial designs.
Again, not trying to be pessimistic. If you are dedicated and are willing to commit the time and effort to make the project work, and learn (quickly) along the way, you will do well.
We Engineers must unite in a thread or Google Hangout and share our ideas or something of the like and bring it back here to the forums. I think that would be effective.
Quote
Do we run this idea by local community college first ?
Yea, lots of EE PhD's at the local CC! 
OP went off and ordered himself some Avalon chips. Join the project in my signature.
Do we run this idea by local community college first ?
okay, u got me on that 1
Do we run this idea by local community college first ?
I quit reading after "okay, I'm just throwing down an idea..."
I am also interested in contributing to this.
I think we can get a much smaller quantity of asic chips by using what is essentially a cybershuttle program:
http://www.tsmc.com/english/dedicatedFoundry/services/cyberShuttle.htm
Taiwan semiconductor offers this, and the original 4000 chip run for avalon run 1 was done using this service as far as I can tell.
That should bring the cost down to $20,000-$40,000 if the FPGA conversion can done on the cybershuttle service. Thoughts?
I think we can get a much smaller quantity of asic chips by using what is essentially a cybershuttle program:
http://www.tsmc.com/english/dedicatedFoundry/services/cyberShuttle.htm
Taiwan semiconductor offers this, and the original 4000 chip run for avalon run 1 was done using this service as far as I can tell.
That should bring the cost down to $20,000-$40,000 if the FPGA conversion can done on the cybershuttle service. Thoughts?
I'll have the final cost numbers on doing it through this program Tuesday/Wednesday, there are several solutions that offer a lower NRE like this, I'm compiling the data from them all will, different solutions will produce different results (hash speed/heat/power consumption) and different cost
Any word? I know there are a number of these prototyping "shuttle" fab houses, but I do not know the process they use to consolidate each individual contributor's design into a completed "composite" design for the shared ASIC chip.
where we at OP?
i m working on similar thing but it seems not an easy task....
ASIC costs literally millions of dollars to develop, I wish you the best of luck though you will have a pretty long road to get there.
No it doesn't. Avalon designed a 110nm ASIC with NRE costs around $200-300k.
So when you say community asic project, are you thinking about something like AsicMiner?
No, I was thinking that the would be in the hands of the investors, but I'm not opposed to an idea like as asicminer
Interesting 
still which I was at my old job. They were manufacture...they built lens crafting equipment. We had an R&D department that I could of asked questions too
still which I was at my old job. They were manufacture...they built lens crafting equipment. We had an R&D department that I could of asked questions too
So when you say community asic project, are you thinking about something like AsicMiner?
Sounds good, what other conditions do you require to back the project?
I am also interested in contributing to this.
I think we can get a much smaller quantity of asic chips by using what is essentially a cybershuttle program:
http://www.tsmc.com/english/dedicatedFoundry/services/cyberShuttle.htm
Taiwan semiconductor offers this, and the original 4000 chip run for avalon run 1 was done using this service as far as I can tell.
That should bring the cost down to $20,000-$40,000 if the FPGA conversion can done on the cybershuttle service. Thoughts?
I think we can get a much smaller quantity of asic chips by using what is essentially a cybershuttle program:
http://www.tsmc.com/english/dedicatedFoundry/services/cyberShuttle.htm
Taiwan semiconductor offers this, and the original 4000 chip run for avalon run 1 was done using this service as far as I can tell.
That should bring the cost down to $20,000-$40,000 if the FPGA conversion can done on the cybershuttle service. Thoughts?
I'll have the final cost numbers on doing it through this program Tuesday/Wednesday, there are several solutions that offer a lower NRE like this, I'm compiling the data from them all will, different solutions will produce different results (hash speed/heat/power consumption) and different cost
Hey, I really encourage you to go and Make the project a Reality, please don't let the troll from avalon or butterfly or others to derail your effort and hard work. All of these involved pretty much 2 elements, time and money. Coming out high hash rate is the way to go and make sure it also can mine other crypt o coins. Don't let the foundry or factories block your path to success and we need to break the monopoly of those 3 guys.
OpenBitASIC project claimed to have come to the same conclusion. They could not find a fab for a reasonable price.
Edit:
There are a few highly experienced asic people here. Such plans and designs would have to be vetted by them before I would consider backing the project.
As a guy who works on ASICs/FPGAs for a living, I wish you luck. It sounds to me like you're being overly optimistic on the amount of time and money required to produce a working chip.
Yes, SHA256 is easy. What isn't easy is all the cell placement, wire routing/sizing, silicon doping parameters, etc etc which all feed in to your final achievable performance.
Yes, SHA256 is easy. What isn't easy is all the cell placement, wire routing/sizing, silicon doping parameters, etc etc which all feed in to your final achievable performance.
why don't you help this community get a hashing asic into your hands then
plenty of designs are already available to copy with minor changes
its just hard to find someone to make the goddamned wafers for a decent price afaik
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