The next step is making chips comprised of millions of silicon layers, as opposed to just 10 or so. With each "layer" being a few nanometers thick, that leaves us a relatively big margin to improve performance (30 years of Moore's Law).
No doubt this allows for an increase in density and more efficient 3-dimensional routing. But how much will this help power consumption?
It seems that 3D architecture would miss the original spirit of Moore's Law. Moore's Law pertained to how many transistors could be put onto an IC component. But the prediction was done at the time with the understanding that IC chips were single layers of integrated transistors (2D).
Going vertical with transistors in the architecture doesn't really increase the density of the transistors per each 2D layer. And doesn't even really increase the transistor density by being in 3D space. Well, no more than cutting an iron plate and stacking it increases the density of the iron atoms in the whole.
The only thing is that you do have more transistors on a single component, and only in that sense is it a semblance of Moore's Law. But I think it still misses the mark of what Moore was thinking. I could be wrong, but that's the way I understand it.
