So, I think I found the problems with the Compac as designed. The ground noise issue was pretty well solved by tying the SGND and PGND together at the ASIC, which neutralized the potentials between local grounds for the VCore and 0.9/1.8V logic power. I also noticed some issues with the regulator occasionally dropping out during startup of the device, because chip init can draw a heft burst current (as noted in previous tests). The output capacitance on the buck was being overwhelmed and tripping out the regulator. I solved that by adding output capacitance in the form of a 470uF tantalum scavenged from a dead Habanero. Which, if anyone's ever stolen parts from a dead Habanero you know that whole PCB is one giant friggin' heatsink. Seriously those things are stout. But with the added output capacitance I was able to start the stick at 650mV all the way up to 250MHz (13.75GH) without issue.
I think the reduced output ripple also caused the ASIC to run more stable, because power consumption was down a bit overall.
Right now the stick is hashing away at 610mV 150MHz (8.25GH) drawing right around 520mA off my test hub. That's 0.32W/GH, not too shabby.
The burst output issue will probably be resolved when we have working dedicated drivers. The S5 code ramps the chips up pretty slowly and I don't see that burst on init like we see with the U3 driver. Hopefully we have working code by the time an Amita is released for testing, since there's no way to test it without working code now is there?
Anyway, so now I have about a dozen PCBs that can be modified to work as a single-chip stick miner. I'm thinking of sending some to my first-wave testers even though it won't be the final product (and probably a homemade heatsink approximating the final) so they can at least start playing with it. I'll be working over the PCB design, checking over the 18-board design, and probably sending off both to fab tomorrow. Once the PCBs for the Compac return and test functional, I can send off for Amita PCBs also since it's an extension of the same design. Boy I sure wish I'd had these errors fixed a couple weeks ago.
The final design will have a different UART level shifter setup, a slightly changed regulator layout (to accomodate the changes in input and output capacitance) and probably a different potentiometer because I don't really trust the one I got right now. If you're playing rough with it and the wiper gets disconnected from the contact surface you'll sorta feed the ASIC with 2V instead of the <0.8V you were going for. I tend to adjust the pot with the Compac unplugged and using a multimeter to set it (which requires the formula for voltage based on pot resistance). I'll probably change the design up a bit to make that fault safer, but probably also spec a new pot anyway.