IBM takes a leap to 7nm | Bitcointalksearch.org

Mr. Kashif

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Quote from: aliashraf on June 18, 2016, 12:07:51 AM

Quote from: Unacceptable on June 17, 2016, 05:08:58 PM

Quote from: aliashraf on June 17, 2016, 09:21:31 AM

Quote from: QuintLeo on June 16, 2016, 03:05:05 AM

BTW - the 8086 didn't have enough memory space to even THINK about trying to process Bitcoin - not sure if the 80*3*86 did for that matter.

Pentium - perhaps, SHA256 isn't that much harder to process than RC5 depending on the RC5 keylength - but it would be incredably SLOW doing so.
If I had to use something out of that generation I'd go with the AMD K5 over the Pentium.

First of all I can assure you one can (easily? may be) rewrite Bitcoin code in a way that can be compiled to be run under 8086, any Turing complete machine is capable of doing this job.
Secondly, SLOW is good, SLOW is great, SLOW is what we need in Bitcoin. Bitcoin sets difficulty higher and higher to slow down things.

Think! Making faster and faster machines to mine is an attack against bitcoin in its essence. Bitcoin 'defends' against this attack by increasing difficulty, good defense but why one should be happy and excited with advancements in ASIC? ASIC historically is a counter-cryptography attack. Think about it!

One word dude GREED Roll Eyes

one of the seven deadly sins Undecided

Lol! Indeed it is greed.

aliashraf

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Quote from: Unacceptable on June 17, 2016, 05:08:58 PM

Quote from: aliashraf on June 17, 2016, 09:21:31 AM

Quote from: QuintLeo on June 16, 2016, 03:05:05 AM

BTW - the 8086 didn't have enough memory space to even THINK about trying to process Bitcoin - not sure if the 80*3*86 did for that matter.

Pentium - perhaps, SHA256 isn't that much harder to process than RC5 depending on the RC5 keylength - but it would be incredably SLOW doing so.
If I had to use something out of that generation I'd go with the AMD K5 over the Pentium.

First of all I can assure you one can (easily? may be) rewrite Bitcoin code in a way that can be compiled to be run under 8086, any Turing complete machine is capable of doing this job.
Secondly, SLOW is good, SLOW is great, SLOW is what we need in Bitcoin. Bitcoin sets difficulty higher and higher to slow down things.

Think! Making faster and faster machines to mine is an attack against bitcoin in its essence. Bitcoin 'defends' against this attack by increasing difficulty, good defense but why one should be happy and excited with advancements in ASIC? ASIC historically is a counter-cryptography attack. Think about it!

One word dude GREED Roll Eyes

one of the seven deadly sins Undecided

Unacceptable

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Quote from: aliashraf on June 17, 2016, 09:21:31 AM

Quote from: QuintLeo on June 16, 2016, 03:05:05 AM

BTW - the 8086 didn't have enough memory space to even THINK about trying to process Bitcoin - not sure if the 80*3*86 did for that matter.

Pentium - perhaps, SHA256 isn't that much harder to process than RC5 depending on the RC5 keylength - but it would be incredably SLOW doing so.
If I had to use something out of that generation I'd go with the AMD K5 over the Pentium.

First of all I can assure you one can (easily? may be) rewrite Bitcoin code in a way that can be compiled to be run under 8086, any Turing complete machine is capable of doing this job.
Secondly, SLOW is good, SLOW is great, SLOW is what we need in Bitcoin. Bitcoin sets difficulty higher and higher to slow down things.

Think! Making faster and faster machines to mine is an attack against bitcoin in its essence. Bitcoin 'defends' against this attack by increasing difficulty, good defense but why one should be happy and excited with advancements in ASIC? ASIC historically is a counter-cryptography attack. Think about it!

One word dude GREED Roll Eyes

aliashraf

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Always remember the cause!

Quote from: QuintLeo on June 16, 2016, 03:05:05 AM

BTW - the 8086 didn't have enough memory space to even THINK about trying to process Bitcoin - not sure if the 80*3*86 did for that matter.

Pentium - perhaps, SHA256 isn't that much harder to process than RC5 depending on the RC5 keylength - but it would be incredably SLOW doing so.
If I had to use something out of that generation I'd go with the AMD K5 over the Pentium.

First of all I can assure you one can (easily? may be) rewrite Bitcoin code in a way that can be compiled to be run under 8086, any Turing complete machine is capable of doing this job.
Secondly, SLOW is good, SLOW is great, SLOW is what we need in Bitcoin. Bitcoin sets difficulty higher and higher to slow down things.

Think! Making faster and faster machines to mine is an attack against bitcoin in its essence. Bitcoin 'defends' against this attack by increasing difficulty, good defense but why one should be happy and excited with advancements in ASIC? ASIC historically is a counter-cryptography attack. Think about it!

irritant

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Sodium hypochlorite, acetone, ethanol

i would go with a Nintendo 8 Bit

http://retrominer.com/

QuintLeo

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BTW - the 8086 didn't have enough memory space to even THINK about trying to process Bitcoin - not sure if the 80*3*86 did for that matter.

Pentium - perhaps, SHA256 isn't that much harder to process than RC5 depending on the RC5 keylength - but it would be incredably SLOW doing so.
If I had to use something out of that generation I'd go with the AMD K5 over the Pentium.

QuintLeo

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Quote from: NotFuzzyWarm on June 15, 2016, 08:12:01 PM

The history of large monolithic mining ASIC's like the Minion (Hashfast?) or BFL's Monarch chips with lots of cores/pipelines/engines/ whatever ya want to call them, let's stick to 'cores', is a travesty of wasted and stolen money (pre-order$).

Not ALWAYS the case.

Consider the Spondoolies "Rockerbox" chips in the SP20 and bigger same-gen miners.

There are tradeoffs to make on the chip size debate - smaller chips = higher yield and less heat per chip but you need a LOT MORE CHIPS to achieve comparable miner performance, which leads to more-complex BOARD level design and a lot more components to go bad, as well as more complexity on heatsink design / air path routing.

Also consider the Gridseed GC3355 - small chip, yet the miners it went into MOSTLY ended up being very poor reliabilidy due to BAD board-level designs (the orb EVENTUALLY managed to achieve decent reliability, but the early versions had a TON of issues. The BLADES never overcame their crap buck design issues).

aliashraf

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Quote from: Prelude on June 12, 2016, 10:53:02 AM

Nice, but we're years away from seeing that in a miner.

Can't understand why people say welcome to this stuff? Huh

I'm not legendary in this forum or in Blockchain , but I'm sure enough to say there is no advantage in ASIC nm development for the community to enjoy it, and contrariwise a lot of trouble here, decentralization and the core reliability of Blockchain will be put in danger.

We don't need ASIC (being 28 0r 14 or 7 nm) to have an average of 1 block mined each 10 minutes , I think (supposedly) we don't even need Pentium processor, a bunch of 8086's distributed almost evenly between some 10 distinct people suffices for Blockchain to survive and perform well.

Most of the people, commenting here, are just lost in the hype of 'advanced technology' , Blockchain is not such a naive technology, it is not mobile, it is not google, it is peer to peer for the god sake!

NotFuzzyWarm

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From the highest yardarm matey with"them" being the designers Wink

sidehack

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The Minion was BlackArrow. Hashfast's big chip had four independent dies on one BGA base; I know they had separate power rails but I don't know about separate grounds or you probably actually could have strung them.

NotFuzzyWarm

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Quote from: brontosaurus on June 15, 2016, 03:08:00 PM

Quote from: gogodr on June 14, 2016, 09:33:10 PM

So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

Just to avoid any confusion I'm assuming you mean big chip = lots of pipelines, so more hashing power, small chip = less etc.

yes.
The history of large monolithic mining ASIC's like the Minion (Hashfast?) or BFL's Monarch chips with lots of cores/pipelines/engines/ whatever ya want to call them, let's stick to 'cores', is a travesty of wasted and stolen money (pre-order$). Whoever did the designs for those and others had no idea about feeding power to and removing heat from those chips. Purely an afterthought. Hell even on 'small' chips Bitmine.ch kept trying to use little stick-on chipsinks for their A1 (and of course having many fall off, burn off). It took the Dragon and clones of it to show them that ya need serious sinks for the top...

With proper attention from the start to even just those 2 points (with #1 being feeding clean power to the logic in the chip) the idea does have merit.

Hmm, possibly do it with several internal banks of string config cores perhaps? Lets ya raise the voltage and drop the current needs vs running all them cores in parallel at low Vc/Massive current... Okay, if a mining chip maker tries it, you 1st read of the idea here from me.....

dogie

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Quote from: RoadStress on June 14, 2016, 04:22:57 PM

Quote from: brontosaurus on June 14, 2016, 02:00:56 PM

No one is going to be seeing a 7nm miner in the next 3-4 years, that's almost certain (assuming Bitcoin is still around then) because it's still at the prototyping stage, the process has to be fully engineered and characterised and that will be a majot challenge in itself.

I thought a bitcoin mining ASIC chip is pretty basic and straight forwards. Wouldn't it be wise to prototype and to calibrate the machines using mining chips since they are so simple? Just asking.

So they're not great for that because an ASIC can survive many cores being trash as they can just be disabled. A chip like an i7 4670k can't have pretty much anything but some cache disabled without having to be thrown or significantly binned.

Quote from: alh on June 15, 2016, 09:55:20 AM

Quote from: gogodr on June 14, 2016, 09:33:10 PM

So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

The number refers to the "feature size" of items etched onto the die (as I understand it). The smaller, the more that can be squeezed onto the die.

More so than that, the smaller the process node the less power doing exactly what you did before uses. Consider a Jigsaw where the size of it is how much power it uses. If you can make smaller pieces, you can make an overall small jigsaw and maybe even add more detail or pieces. For the same power budget you get more done.

sidehack

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Power density becomes a big problem with large dies and requires complex or exotic cooling systems. High current density is going to kill peripheral parts count and regulation efficiency.

brontosaurus

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Quote from: gogodr on June 14, 2016, 09:33:10 PM

So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

Just to avoid any confusion I'm assuming you mean big chip = lots of pipelines, so more hashing power, small chip = less etc. You are not referring to the process node or feature size, ie 40nm, 28nm and so on? If it's the latter, sorry for butting in. If it's the former most of the asic chip designs have tended to be smaller rather than larger, the logic goes that you have a better chance of avoiding defects on the silicon wafers if you have smaller chips, and even you do hit one it's a smaller and less costly chip thats becomes useless. Bigger chips do have other things on their side but there are valid arguments for both points of view, personally my view is that if Intel and others can routinely make incredibly complex chips of 250 mm² with very high yields, then making a 120 - 150 mm mining chip with simple, repeated circuitry should be relatively simple.

ZedZedNova

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Quote from: gogodr on June 14, 2016, 09:33:10 PM

So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

This is a bit dated with respect to feature sizes, but the topics explored are all the same.
http://ask.metafilter.com/49898/Why-does-computer-chip-process-size-have-to-keep-getting-smaller

- zed

toptek

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Quote from: gogodr on June 14, 2016, 09:33:10 PM

So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

also look at this way 22 weight wire is bad in some cases but 12 weight wire is better and you can do more. the number may be smaller but the wire gets bigger only in this case the trans they put on it are super small and making it smaller actually allow for less power usage and makes it run better or is suppose to and gives it more room . so they can do more per chip . kind of the layman term.so look at it in terms of the wire 22 is big but 12 is bigger so it's kind of the same but it not .it is smaller but bigger in the way it does it

because there is less for the software or whatever is controlling it to do that lets it use less of everything but do more and suppose to be less heat but that one is still a problem kind of.

alh

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Quote from: gogodr on June 14, 2016, 09:33:10 PM

So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

The number refers to the "feature size" of items etched onto the die (as I understand it). The smaller, the more that can be squeezed onto the die.

ZedZedNova

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Quote from: sidehack on June 14, 2016, 08:54:26 PM

...it gets cooler? Dang, I'm in the wrong business. That's freakin' sweet.

I believe that the proper term of art for the equipment/process is "electron beam prober"
https://en.wikipedia.org/wiki/Electron_beam_prober

gogodr

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So the smaller the chip the better? Can someone explain to me why that is? I figure the bigger the chip the more it can handle but I guess that's not the case here is it.

ZedZedNova

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Quote from: 2112 on June 14, 2016, 09:10:40 PM

Quote from: ZedZedNova on June 14, 2016, 08:48:23 PM

If it's a "legit" co-lo facility, security can be part of the package. How secure depends on the facility and how much you want to pay...

Paying for physical security and achieving a physical security always were (and are) two different things. I do remember working at one of those "secure colocation centers" which had armed guards and hand geometry scanners near the front door and a wide-open elephant door in the back where theft was going by the truckloads.

Co-location was and still is full of completely fraudulent security theater.

Since this thread has IBM in the title I also remember that IBM used to do "security ratings" for their partners. The suburban office with separate alarm circuit for the IBM-partner equipment room, no guards whatsoever and the receptionist and all employees mutually recognizing each other by sight would get higher rating than that "secure colocation center".

Edit: Found the link to those "secure" co-locators: https://en.wikipedia.org/wiki/Exodus_Communications

Yep. Caveat emptor, and verify everything if it is that important.

I did a security guard gig for a couple of years while I was going to college before I worked for the chip maker (also while going to college). I can't/won't vouch for the other shifts but when I was on duty I knew who was where and who belonged where. I also knew when there was someone new on the shift. I know I annoyed the fsck out of people making sure that they had their required ID, but it kept the questions down when "things" happened, like the time I discovered the door to the CEO's office unlocked.

Topic: IBM takes a leap to 7nm (Read 3251 times)