Topic: Intro: U.S.-based ASIC design group w/ patent on reducing electrical consumption - page 2. (Read 1557 times)
December 07, 2017, 11:10:33 PM
Send me a miner when its ready, I'll pay for it and make a review.
December 07, 2017, 11:08:32 PM
I was waitng for NotFuzzyWarm to weigh in, but that was pretty good too.
December 07, 2017, 11:02:58 PM
1971 called and they want their depletion loaded common source inverter back.
50% cheaper, oh and we're going to run on an soi process. So by 50% cheaper we mean 50% cheaper than other soi processes, which means 3x the cost of p-type silicon wafer processes.
And we don't need pact implant! Don't mention that it will cost you more to take pact/pdd/pvt out of a standard cmos process than you would gain by dropping, what, 3 masks out of 18? Thermal budgets are a thing.
And who's going to fab this custom process for you, VIS? UMC? TSMC dropping everything to make you one lot a month? Not likely.
You have one engineer who seems to have his shit together, no process guys and two marketing guys. That's a pretty bad ratio of people who know why your idea won't work to people who buzzword synergy all day long.
Your tech pitch smells like bullshit, would you mind posting the links to your patents that seem to be absent from your site before you pitch your ICO?
Hugs and kisses!
50% cheaper, oh and we're going to run on an soi process. So by 50% cheaper we mean 50% cheaper than other soi processes, which means 3x the cost of p-type silicon wafer processes.
And we don't need pact implant! Don't mention that it will cost you more to take pact/pdd/pvt out of a standard cmos process than you would gain by dropping, what, 3 masks out of 18? Thermal budgets are a thing.
And who's going to fab this custom process for you, VIS? UMC? TSMC dropping everything to make you one lot a month? Not likely.
You have one engineer who seems to have his shit together, no process guys and two marketing guys. That's a pretty bad ratio of people who know why your idea won't work to people who buzzword synergy all day long.
Your tech pitch smells like bullshit, would you mind posting the links to your patents that seem to be absent from your site before you pitch your ICO?
Hugs and kisses!
December 07, 2017, 01:54:22 PM
3B Technologies (St. Louis Park, Minnesota, US) is a team building ASICs using their patented technology that allows hashing to occur with less electrical consumption. Their first ASIC will be SHA-256 (for Cryptotech), with plans to enter X-11, Scrypt and perhaps other mining algos at a later time.
- Technology: http://www.cryptotech.no/elements/pages/our-stores/
- Team: http://www.cryptotech.no/elements/pages/about/
Quote
Cryptotech’s novel unipolar logic only utilizes one type of transistor – either NMOS or PMOS only.
In the case of silicon circuits, NMOS only is chosen for its much higher mobility compared to PMOS.
Manufacturing costs are lower since the fabrication is simplified (no need for doping of PMOS transistors).
In the case of silicon circuits, NMOS only is chosen for its much higher mobility compared to PMOS.
Manufacturing costs are lower since the fabrication is simplified (no need for doping of PMOS transistors).
- Technology: http://www.cryptotech.no/elements/pages/our-stores/
- Team: http://www.cryptotech.no/elements/pages/about/
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