Topic: LargeCoin is scared of BFL - page 2. (Read 5438 times)

The fact that LargeCoin is conducting such a survey is troubling to me and doesn't make sense.  From what I know about LargeCoin they don't know what they are doing.  I hope they prove me wrong and maybe they will have an actual product.

The LargeCoin Announce list is split on the issue:

I believe what BFL says.  See what they said below:

If the Jalapeno is pushing 7W @ 3.5GH/s, that would make more sense. They might also end up just adding a barrel jack onto it, who knows. It's not like that would be dealbreaker for most, and if they use an existing design for a coffee warmer (still a retarded idea IMO) it would likely already have that in the mold. Better to use external power than be risking maxing out a USB port and having devices get shut down.

My biggest problem with this whole situation is that I believe they're straight up lying about VC funding, or at least that they got enough to fund the design. They might have had the design simulated, but are using the customer funds to produce the mask set and first run of chips. In that case, schedule slippage is a very real possibility in the best case. The other huge problem with that is that if there is an issue and a respin is required, the customers are basically unsecured creditors of a likely insolvent company and are fucked. If BFL could show proof that the preorder money is in a relatively safe store of value and isn't being used for RnD and production, I would probably feel comfortable enough to buy a single or two to keep mining next year. As it is, it's just too risky.

DOH I forgot about the double SHA-256.  I will leave my 140MH/J (single hash only) numbers up for shame.  Looks like you did the same caclulations as I did but properly used 1024 bits per Bitcoin hash instead of 512 bits per normal single SHA-256 hash.

I agree 1.5GH/J is going to require a full custom on 65nm or better.  I could see a 45nm structured doing maybe 800MH/J though.  There is a simple explanation possible (pure conjuecture on my part).  Maybe the Jalapeno requires 2x USB ports.  Lots of CD ROM drives for laptops do that.  They use >3.5W but <7W and use 2 USB ports to handle the load.  Once again pure speculation on my part.   If the Jalapeno does indeed run at <=3.5W it would need to be a full custom.

Still I think this sums my point up

My point was just that it is POSSIBLE.  Will BFL produce it?  Honestly I don't know or care.  It is all speculation.  BFL has a bad track record but then again they claim to have VC funding.  A VC could have deep enough pockets for a full custom.  

Are you sure that's right? They listed 13.76mJ/Gbits. A double SHA-2 would be 1024 bits, so it should be about 70MH/J. That's a long way from 1000MH/J. Possible with a more advanced process and a better design? Maybe. That design also had the SHA-2 portion of the chip being 0.125mm^2, obviously not including wire pads and whatnot that would also be needed on BFL's chip.

They ran that at 200MHz for a max Tp of 1.51Gbps. Guo's seminar paper also stated that the static power of the ASIC was <1%, so let's assume we can scale power linearly with clock speed. Let's assume that design optimizations can cut the area and power use by half for the same single SHA-2 round. That would give us 0.0675mm^2 for a round and 2.56mW @ 50MHz, giving 369kH/s (BTC double SHA-2). Let's say we can scale this up to 1GHz with no increase in voltage and a straight linear increase in power and hashing. That's now 0.0675mm^2 with 51.2mW and 7.37MH/s per round @1GHz. To get 3.5GH/s out of one chip, you'd need 475 such rounds, giving a die size of 32mm^2 and power use of 24.32W.

Now, if they went 2 full nodes down to 65nm, and really did go full custom instead of standard cell and could do maybe a 5x improvement over the VT design, I could see BFL's numbers being reasonable. That's a huge huge leap though, a full custom 65nm design would not at all be cheap to produce.

They have clearly stated that it is not structured but full custom. Meaning they are jumping over one generation of hardware and have budget of tens of millions USD on R&D.

I have no idea whether they will deliver or not.

I personally, do not think BFL will deliver what they say on time. (regardless of if, or if not it's technically possible/plausible)

You've done this before huh...lol

This 130nm shared wafer research ASIC can achieve 140 MH/J performing SHA-256 on a streaming input.  



http://rijndael.ece.vt.edu/sha3/index.html

Keep in mind:
a) this was designed as a testbed for SHA-3 and runs at only 50 Mhz.  Not exactly ideal for SHA-256.
b) it is on a 130nm platform.  65nm would be roughly 4x the MH/J. 45nm would be roughly 8x the MH/J
c) VT own data (once again not the intent of the research) shows that SHA-256 can easily run at much higher clock speed without increasing the gate count (and thus electrical cost).
d) the design is optimized for streaming large amounts of data which is ill suited for Bitcoin (where single nonce header is hashed once, checked and discarded/returned).
e) it was designed as research project at my alma mater Virgina Tech (hardly ultra cutting edge fabrication).

Despite all those handicaps this unoptimized (for Bitcoin hashing) ancient 130nm multi-purpose shared wafer chip built at a university research fab can achieve 140MH/J.  With optimization and a modern 45nm process >2 GH/J is certainly "possible".  

Once again before you misinterpert.  I am not buying any BFL product (or any new mining hardware).  I don't really care if BFL has the greatest hasher on the planet or the best scam.  I agree it is foolish to give money upfront and hope for the best.  All that being said you undermine your argument when you claim the possible is impossible.

Is a 3.5 GH/s ASIC running on 3.5W possible?  Most certainly.  
Will BFL produce it (and on time, and on spec)?  Who the frack knows.

How much is the cheapest miner that they make? I really just want one for a conversation piece. If I happen to find a block that would be something.

We have a good guess.  They claim their 3.5 GH/s chip is USB powered.  So there you go.  1400 MH/watt (or better), which means if the 1 TH/s Rig is using the same chips in parallel, 714 watts.  And thats assuming they are using the exact same components in each product, which makes no sense (why produce special cases when you can just offer bulk discounts).

That's why only an idiot would give them money in advance for a product which has no proof of concept (or even proof of development starting).  Their numbers are pulled out of their ass.

Who's to say they haven't spent that much? With a VC investor, you can spend more than you normally would without one.

And, some of the numbers that others have presented in terms of hashing ability for a custom chip on various processes have been reasonably convincing. I still have my doubts about "USB Powered" and not needing an external brick, but meh.

50K using 500 chips per box at 100 USD per chip.

spiccioli

Um not that I really care but don't you see the stupidity of your claim.


I mean it can't be both.  Hypothetically if they did need 500 chips per TH/s then obviously they are going to need 100,000+ chips to meet demand right?

I mean nobody designs a rig which requires 500 chips and then says "hmm how about lets start with 2,500 chips total".  It would be more like...  I think we can sell 200 of these so we should probably order 100K chips.

Now lets say your wrong about the upper limit being 2GH/s chip.  Lets say it is 5GH/s per chip.  That's 200 chips in the 1TH rig.  Now lets say in volume of 100K chips the per unit cost is $50.00.  That's $10K per rig.  Even on the upgrade price they are solidly profitable.

For the record I don't know if BFL is telling the truth, if it is a scam or not, or if they will meet their deadline.  I do know your claim that it is impossible and that their specs require them to be a competitor to Intel is just stupid.

Unless you want to spend $5-10M in NRE, you're going with a structured ASIC process. eASIC and Alterra HardCopy are the only options here. Chips will be capable of 2GHash/s each, approximately. So, assuming BFL is using a structured ASIC process to keep NRE less than millions, they'd need 500 ASICs to generate a terahash. Unit costs are small if you produce 10,000s of ASICs; however, when your production is in the hundreds or low thousands, you're looking at $100s per unit. That terahash box has a cost base of $500K, by our estimation.

Yes, and no wattage has been posted, so right now all we have are guesses.

Well, I might make note of something that makes a difference - they say 1Th/s, not 1.5.

Additionally, that 1 Th/s is with multiple chips in a box, and the number is unspecified. My understanding of full-custom ASIC processes is that chips are cheap to make, once the NRE is recovered. Like, REALLY cheap.
So I do believe it is possible, but I also am of the opinion that they are staking an awful lot on the outcome.

Once I have money coming in I am going to buy at least one and try it out. Just cause i want to have a Bitcoin miner appliance as a conversation piece.

"Oh that? That is my Bitcoin miner" "Your what!?"

Yes, we certainly are. And so should everyone in the ASIC business, including Intel. If BFL's numbers are to be believed, our assertion is that they have discovered new manufacturing processes that are vastly more efficient than anything the semiconductor industry has seen before.