Topic: Leading SHA256 Solution Provider Acquires Venture Capital Funding (Read 6152 times)

fixed that for you [2]

I apologize. To be honest, I hadn't realized how many people had now received their BFL single. However, the circumstances around this company still warrants a high degree of skepticism.

That's not the first picture. And that is the second redesign. You weren't here that long ago, otherwise you would have seen other things. This for instance: http://butterflylabs.com/wp-content/uploads/2011/11/IMG_1817.jpg

And maybe this: https://eclipsemc.com/bfl/bfl-8.jpg <-- 25 Nov 2011, and it hashes! More here: http://eclipsemc.com/bfl/

It was at the point that they discovered that the power subsystem was insufficient, requiring a redesign.

First reference to EP3SL150 (by ngzhang) 12-1-2011
https://bitcointalksearch.org/topic/m.637417

First picture of PCB 1-20-2012
https://bitcointalksearch.org/topic/m.705354

That's a 2 months difference.

And no, photos of a finished PCB do not constitute a design, either. We have no way to tell if the PCB has errors simply by looking at it. These things do not always come back correctly the first time, especially if the designer is inexperienced.

Yeah, just because photos of a finished PCB don't constitute a design. Right. Uh huh.

Again, you have no idea what design they had at any particular point in time. This is your personal assumption.

By "finished design" I meant "a design that the forum has had no input into" but I didn't expect you to catch that. They also had a design that never shipped, but that was mining at reduced speed due to poor design choices.

You don't know that they had a finished design. This is an assumption on your part.

It's entirely possible that a student could approach the R&D engineers at a local university's EE department for help in laying out the PCB after he knows what plausible components to specify. He would only have to tell them it was for a school project. If I were investigating this I would begin by calling all the universities in the KC, MO area. I would ask them to look at the picture of "ninja lady" and if she was on their payroll.

This same student could not however approach the department and ask them to design a board and specify components that would achieve a certain number of SHA-256 hashes per second.

Additionally, this student wouldn't have the experience necessary to implement the SHA-256 algorithm and spend the months necessary to unroll and route and debug the implementation.

Every manufacturer of FPGA devices, except BFL, followed the same formula: They announce exact specifications with pricing. And then they deliver in a reasonable timeframe.

BFL is not following this formula. Use your imagination as to why. (PRE-)BUYER BEWARE.

Oh god you are so completely retarded. If you came up with that bullshit after reading all the info available to you on this forum, then I would have to say that your reading comprehension is, at best, not up to snuff.

I'll answer each point just once because you need some help in the research department:

The forum did NOT design the Single for BFL. Where you heard this, I don't know. Citation please? They (BFL) suddenly appeared with a website and a promise of extraordinary performance, including a finished design. The performance claims were ripped to shit by the forum, and they eventually got around to building their design and found out that the cooling and power were insufficient. At no time did they even solicit design suggestions from the forum; all decisions were theirs alone.

During this design process, some high resolution photographs of the PCB and the chip were uploaded, and the folks here guessed based on those that the chips were EP3SL150 devices. This is before any of them shipped.

After that, they finally started shipping, and one of the units made their way into the hands of ngzhang. He did not have to "hack the shit out of it", he simply had to solder on a single resistor or jumper in order to reconnect the JTAG pins. After that it was as simple as hooking it up and reading the IDCODEs. There is no possible way that the chip on the board would have been something else; that would have required a board level redesign which would have been nothing more than a waste of time and a diversion. Replacing the chip on the board and retaining a functional or partially functional device without a board level redesign is highly unlikely to the point of being absurd.

And finally, even if ET or ngzhang were to verify the authenticity of a Single by saying they have one, you would just be there saying they don't exist either. Why shouldn't anyone be informed about what they are getting? It requires professionals that know what they are doing to identify much of this stuff, it isn't something that 99% of the consumers can do.

Please shut up and stop bullshitting. You are only making yourself look more stupid.

The forum basically designed the single for BFL.

And, after the forum did all the extensive research, a pcb carrying the EP3SL150F780 chip ended up getting shipped to ngzhang.

It was claimed to be "broken." From the sound of it ngzhang had to hack the shit out of the board to probe the chip.

We'll never be sure if this was simply an altera chip on a pcb or an actual functioning product.

About the only thing I'd believe at this point, with the situation being so strange, is if someone like eldentyrell or ngzhang got their hands on a functioning BFL single.

Don't do these people's research for them. Don't post plausible designs the the forum. You're only making it more difficult to find out if this is a legitimate company by discussing their "products" in such depth.

Sure, they are estimates  based on pre-layout synthesis, and afaik the 90nm chip hasnt been built, but at this point the same probably goes for the BFL chip, so its not an unfair comparison . The 130nm chip was build. In fact, you can request a free sample if you want.

ITs also worth pointing out these chips are not optimized for bitcoin, but general purpose sha2 hashers. The 130nm chip isnt even optimized for SHA2 the whole paper describes all the trade offs they made to get those 5 or whatever competing SHA3 algorithms implemented. Whatever you want to read in to the results, they are not the highest possible, most definitely not for bitcoin.

You're mem, aren't you?  +1 for the ignore list just in case.  Furthermore, these guys aren't geeks;  they're educated individuals.  You've obviously got nothing to add, it'd be my suggestion to shut-up and maybe you'll learn something.

See this is the stage where all the geeks on the forum argue until they basically come up with a plausible design for BFL's products given their vaguely specified performance claims.

And, if BFL is a dishonest actor, they could use this information to continue being dishonest.

You realize they are different documents right?  If you had read my posts or read beyond page 1 of the paper you keep quoting, you might have noticed at the end it has actual performance and power numbers for the asic implementation. You can compare that to whatever  uber optimized fpga you want, so who the fuck cares about that quote of yours about what they did during prototyping. Their ASIC numbers are NOT relative to the FPGA prototype, those arent even published.

The other document, the powerpoint, is a head on comparison between FPGA and ASIC implementations.

But who cares, clearly you are not interested in reading or finding out what you dont want to know.

Oh, I dunno, maybe because you posted the paper in defense of this comment?


BTW, I can post that paragraph from the first page again in blue if you like!

Still stuck on page 1 I see.
Here I was thinking you were smart.

Let me try big fonts.

BECAUSE THEIR GOAL IS BUILDING AN ASIC

WTF do you want them to optimize for an FPGA? Go read the ASIC results.

Maybe if you render the entire paper in that same big red font you can actually read it and understand that the FPGA was used for prototyping and therefore FPGA specific optimizations where not used. Now read about the ASIC, will you?

Oh well, I guess you are just trolling. You can lead a horse a water...

5.5 Gbps is at a core frequency of 735 Mhz, and the 3.1mW power number has this note by it: "The power consumption is estimated for the frequency of 100 MHz". Furthermore, all the numbers are synthesized. They say they plan to tape out all the different implementations for comparison, but I don't think that's actually been done yet.