Topic: Raspberry Coins - Cyclone V - 28nm based FPGA miner (Read 8320 times)

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec. This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex? It is possible that the restricted fmax has to do an M10K. According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec. (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link Cheesy

--- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec) as a result. --- (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V. We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts. Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA. We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

I look forward to seeing what you can bring to the table, however you are a bit late and will have to think about pricing more closely. Even overpaying for a BFL Jalapeno 5GH/s @ $2500 right now is still a better deal; and once BFL catches up to sales (which is going fast now), they are only $274 for 5GH/s!

Your only hope is to build a litecoin fpga miner (and I'm in if you do so).

bclcjunkie

hero member

Activity: 833

Merit: 1001

Tony it's good to see you're putting effort but i'm afraid you'll be wasting most of it by the time your product is ready... i know it feels like you're almost there but then you get pulled back... Grin

you're aware that there's a trainload of avalon diy miners coming onto market sometime in aug and sept right that will send difficulty to insane levels...soon 5gh/s klondike 16 boards will become a norm instead of FPGAs... IMHO you still have time to turn around and map a better venture... if i were you i'd plan about assembling miners from Avalon and BFL chips since you're already making contacts with those chip assembly companies...

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec. This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex? It is possible that the restricted fmax has to do an M10K. According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec. (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link Cheesy

--- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec) as a result. --- (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V. We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts. Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA. We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

LazyOtto

sr. member

Activity: 476

Merit: 250

that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

No.

It means they are theoretically more cost effective.

Have you built and tested / verified on a prototype unit yet?

-- edit

So far you have only talked about Quartus results.

No hard realities.

Shall we talk about BFL?

vm1990

legendary

Activity: 1540

Merit: 1002

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec. This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex? It is possible that the restricted fmax has to do an M10K. According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec. (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link Cheesy

--- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec) as a result. --- (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V. We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts. Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA. We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

pretty impressive people always bash new toys but im pretty interested in this and im sure alot of people will go crawling under the rocks again if you can get similar results on scrypt mining

the post has been book marked and will be watched closely Cheesy

J35st3r

full member

Activity: 196

Merit: 100

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

Oh what sweet tongue'd self praise. You chose to compare your product against the most expensive ASIC product on the general market (relative to ROI), and you come out better. Give it up. 28nm FPGA's will never compete with realistically priced ASICs (and they will come to market, sooner or later, there is just so much profit being made by the manufacturers right now that real competition is bound to kick in, and soon).

tony_357

newbie

Activity: 33

Merit: 0

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec. This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex? It is possible that the restricted fmax has to do an M10K. According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec. (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link Cheesy

--- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec) as a result. --- (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V. We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts. Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA. We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

tony_357

newbie

Activity: 33

Merit: 0