This is purely exploratory but financing the tapeout/production is the easy part..Its the R&D that worries me
It had occurred to me to start with ICARUS..but based on my experience adapting an FPGA to an ASIC is pretty risky compared to starting with a verified design and just moving to a new process. Especially with the time factor... honestly I don't know what IP was used in those FPGA boards thats not synthesisable or not available to license
I am guessing based on your comment you already know what I am thinking. I kinda figured that there had been a number of improvements since icarus in order to get the hashrate/watt up...My initial thought was that if I could get my hands on something that was verified already in a relatively recent iteration it would derisk a project like this...
That being said, I haven't reviewed the designs of any of the ASICs or FPGAs... If the IP is out there and its a matter of just getting a few layout guys, well that's pretty damn interesting....
Topic: SHA256d IC design question - page 3. (Read 1061 times)
Do you have the money to tape one out?
The entire field of asics has a very narrow bloodline starting with grandpa Icarus and his kids. There are improvements along the way, but you can see his heritage in all the children once you get to know them a bit.
Most generational changes are stuffing more hashcores and doing manufacturability/convenience tweaks. There's only so many ways to unroll a loop, but you need a couple experienced layout guys to place it - you wouldn't want to P&R the whole thing, it would perform poorly.
The entire field of asics has a very narrow bloodline starting with grandpa Icarus and his kids. There are improvements along the way, but you can see his heritage in all the children once you get to know them a bit.
Most generational changes are stuffing more hashcores and doing manufacturability/convenience tweaks. There's only so many ways to unroll a loop, but you need a couple experienced layout guys to place it - you wouldn't want to P&R the whole thing, it would perform poorly.
for any ASIC/FPGA designers , I would love to have an offline discussion about this
What is the possibility that someone would have verified verilog/VHDL for an SHA256d ASIC from a current or defunct company ( BF or BM28NM for example) that they would be willing to sell ? Does anyone know if the 16nm and 10nm designs use the same logic as the 28nm, as it seems to me that is the case.
Is anyone trying to complete a improved ASIC at this point ?
What is the possibility that someone would have verified verilog/VHDL for an SHA256d ASIC from a current or defunct company ( BF or BM28NM for example) that they would be willing to sell ? Does anyone know if the 16nm and 10nm designs use the same logic as the 28nm, as it seems to me that is the case.
Is anyone trying to complete a improved ASIC at this point ?
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