A good job kramble your port to LX9 for other developer boards. Can you create a new folder in your git project for Mojo? with a base that we can contribute.
The first task we could do is to use the usb port and avr_interface library to communicate, how do you see?
OK, its up now at https://github.com/kramble/DE0-Nano-BitCoin-Miner/tree/master/Mojo_LX9
The README should be pretty explanatory. I was unable to build the six hasher variant as PAR did not complete (overnight). It ought to fit (my homebrew Xilinx_LX9 is essentially the same code), so I need to investigate FPGA Editor to see if I can tweak the placement. So the current version is configured for three hashers (config is near the top of fpgaminer_top.v) and 50MHz. I'm using a PLL so device frequency is also configurable (if you get it working at 50MHz, try running it faster, best to use 10MHz increments to avoid weird divider ratios).
I won't be able to test it myself as I don't have a Mojo board, but I will do a port to run it on my homebrew LX9 later today (ie keeping the mojo serial code). The python mining code does work though, just be sure to set the correct COM port at the top of the file. For python neophytes, beware changing any whitespace, as space is syntax in python
BTW This is mostly fpgaminer, makomk and technohog's code, so thanks are due to them. I just tweaked it a bit.
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NOTE: a small board (Mojo) that can serve to mine, right?
Yes, but only at a few MHash/sec ... dust! You'll probably never reach the pool's minimum payout at that rate!
