Topic: Will fund ASIC board for mining community. Need Hardware devs. - page 6. (Read 41463 times)

I would just like to repeat here, that for the sake of safety of our money it would be really nice to build into protocol hashing based not only on sha256, but maybe 2-3 other algorithms. This makes bitcoins much much safer. It could start at block number 300k or something like that.

It would of course make ASICs quite useless (unless somebody produce them for this new version).

Somebody selling hardware dedicated just for mining is inevitable with bitcoin growth, so this is one of the last moments for such a big change (we don't want blockchain splits because of miners that invested a lot in ASICs later on). Such change could make bitcoin solid as a rock. Even broken sha256 would not be a threat.

So you would release  the design as open source and also sell them at almost the cost-to-produce?

It depends on the technology used. There is a rather large one-time, non-recurring expense, and then some price/unit for the actual manufacturing. Of course the more you can pay upfront, the better technology and lower per unit cost you get later. I made some research yesterday (and I was just about to open such a topic ), but unfortunately the manufacturers are pretty secretive about their prices.

But it seems to me that the lower end starts somewhere around $100k one-time cost which gets you a structured asic. This will give higher performance than an average fpga, but far from a real asic, and also the unit cost won't be that low. (but much cheaper than an fpga) As far as I know, ArtForz is about to order such a design.

For a real ASIC however you will need to pay a lot more upfront. (a million bucks? couldn't find exact quotes anywhere), but you could absolutely own the network with dirt cheap ICs. The technology is the simplest possible: only digital gates, no analog stuff, you don't even need memory blocks, also no complicated IP is neccessary, everything can be done and tested on FPGAs. The thing could easily run at least 100-200 MHz, even with an older technology (you don't want to pay for a 45nm process), and probably a few full pipelines could fit in. That means several hundres of MHash/sec on each chip, possibly more. The chip can be in a very simple case, with low density pinouts, so it could be soldered very easily, even with DIY methods. But that would take a lot of time with for example a thousand chips   If you had the money to manufacture the IC, making the PCB is pocket change. And bamm, you have a lot of panels, each of them with around a hundred chips, each chips putting out 100s of MH/sec. There is a topic somewhere discussing whether the CIA could commit 50% of the full network power. Well, they certainly could.

There is a free fpga design out there already, that's a good starting point. What it lacks is a mean to distribute the work and collect the result, as it currently has some hack relying on the debug features of the fpga and its dev panel. But it wouldn't take really much time to come up with a full design that can be quickly converted to any format the manufacturer needs.

Also, if you want to be safe, you probably want a design that can be somewhat reconfigured, so if the mining project fails, you still have an IC that can be used for other tasks requiring fast SHA-256 computation.

This sounds great but my understanding is that those design costs can be quite significant.... 800k to 2 mil USD.  Is that about right or can it be done cheaper? 

Following this thread with interest!

I don't see him here

What about power consumption? Sounds amazing.

This sounds legitimately true from a few random sources speaking about ASIC and possible performance numbers comparing to graphics cards.
It will be interesting what you can manage to produce, sounds very economic. The ASIC stereotype is that it'll provide more speed just because it is chips on a board, why do you think that ASIC is going to work successfully with your plan to fit it to PCI(e) slots.

I have a rudimentary design right now. It is the circuit in gate array format that I designed. It is not a final design by any means, but it allows me to identify the key bottlenecks of the system, calculate gate propagation, maximum clock speed, etc. So what I have from this is; 8MHz clock, 1 hash per clock, and 100 pipelines. This could fit on low volume production run for 27$ / ASIC from TSMC. You then need to add the cost of shipping, putting it on a PCB board and add a controller, + design cost for the lithography. So basically, 800 Megahash/s, for 57$ or so (+ design costs spread across the production line). And that is without the optimization to the main bottleneck (a 7 input adder) that I am working on. So it is encouraging.

You can easily add 4-5 ASIC on each PCB board improve the Hash/$ ratio. So, with 5 ASIC per board, you would get 4GIGAHASH/s for 165$ (+ design cost). (the price of a 5850). Essentialy it makes gpu mining obselite.

Hi ahtremblay. This is my first post in the forum. I'm new to the BC realm, but have been lurking a while.

The idea sounds great. However, do you mean a printed circuit card with the chip, or just the ASIC chip?
Have you any idea on what comparitive cost might be of the card compared to a GPU?   i.e. $/Mhash

Also, what kind of initial target hashrate might be desired? One could always throw more chips on the card to increase the rate... it would be more cost efficient than a chip per card. Or, perhaps, it can be designed so that multiple chips can be installed on one card (by the user)...somewhat like multiple GPU's can be installed on a MoBo.

The cost to develop it certainly does. 

does anyone have a rough estimate of cost right now? I though the cost to produce makes it a lot more expensive than GPU mining...

Since nobody posted a link to this tweet yet - seems relevant: https://twitter.com/#!/MikePFrank/status/78409140699017216

Note that I have no idea how the terms VLSI and ASIC relate to each other, only that both are talking about chips. 

Don't you dare say FPGA in front of ArtforZ, he will scold you into oblivion.

Count me in then. I am open for quite some boards.

Just commenting so I can follow the thread.

I would donate some bitcoins for this and would probably buy them.

I think there as been a misunderstanding. If not, then I apologize. But, I do not intend to simply release the design, as an "open source" file. I intend to finance the construction of a batch of ASICs chip based on a design, and sell them at cost-to-produce. So that miners can use them.

TSMC is simply an example.

Search for the term FPGA - this has already been discussed at length in there. The FPGA people already have working implementations. The big impediment to ASIC implementation is the cost not the talent on these forums.

Cool idea.  I'd buy one if it were cheap enough... perhaps a kickstarter project would help offset your costs. If you're planning to make it open-source or public domain, there's no disadvantage I can foresee.

Also: is there some reason you chose TSMC right off the bat or was that an example?  I believe ArtForz used a structured asic approach which is significantly cheaper in smaller quantities...

I have read everything there is about ArtForz, so I know. But he is not exactly making the ASICs available to the community. This is the reason I am doing it.