Forgot to add, if we take your 'nominal' chip speed as 100GH/s, as per your website, and your GH/mm
2 (
) as 1.4, then your core chip size would be 70mm
2, or approximately 79 mm
2 die size, yes? Also means the chip has to dissipate 19W, but that's entirely feasible.
For that hashrate versus die area in 28nm, it suggests strongly that your chip isn't full custom at all, it's more likely a regular standard cell implementation. 70 mm
2 gives a rough 'equivalent' gate count of around 115M allowing for your control circuit. Divided that by the 450k gate equivalents needed per pipeline means there are, surpirise, surprise 256 pipelines per chip.
To get your 100GH/sec it needs to run at 400 MHz, which for 28nm means you're either being ultra conservative in your chip timing, it's a really bad design - which I doubt - or it's running sub threshold which is absolutely fine, of course, but these calculations are based on standard designs.
In short, you're asking your investors to pay for the NRE & production of a chip which on the face of it doesn't offer any real advantage over solutions that are available from competitors.
Possibly I'm missing something here?