1GH/s, 20w, $500 — Butterflylabs, is it a scam? - page 31.

ngzhang

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Quote from: fizzisist on November 17, 2011, 09:38:26 AM

Quote from: ngzhang on November 17, 2011, 08:28:43 AM

you are right. give me 1500$, i can easy build a mining board by using 2X virtex6-240T, which is easily achieve 800-1000MH/s with that PCB size.

Wait, how would you put two of these on a board and sell it for $1500?

some days i asked a fpga vender, V6-240T is about 700$

DeathAndTaxes

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Gerald Davis

Quote from: fizzisist on November 17, 2011, 09:38:26 AM

Quote from: ngzhang on November 17, 2011, 08:28:43 AM

you are right. give me 1500$, i can easy build a mining board by using 2X virtex6-240T, which is easily achieve 800-1000MH/s with that PCB size.

Wait, how would you put two of these on a board and sell it for $1500?

Digikey prices on those are pure ripoffs. Note they don't even have them in stock. They simply buy on-demand and drop ship them to you. The only reason to use Digikey is because you need 1 for a prototype or R&D and don't want to buy more than 1 unit in case the product fails to live up to expectation. In even small volume from a real distributor they are more like half that (or less in higher volume). Digikey is simply taking a 100% markup in exchange for the ability to buy a single unit.

Still I am thinking he was saying build cost is $1500. Not retail price. As in the cost of components plus assembly. Nothing allocated for developers time, development software, retail markup, fraud, defects, capital risk, etc.

fizzisist

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Quote from: ngzhang on November 17, 2011, 08:28:43 AM

you are right. give me 1500$, i can easy build a mining board by using 2X virtex6-240T, which is easily achieve 800-1000MH/s with that PCB size.

Wait, how would you put two of these on a board and sell it for $1500?

DeathAndTaxes

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Quote from: P4man on November 17, 2011, 09:29:19 AM

Why oh why would anyone spend these kinds of resources on some unbelievably elaborate scam that involves selling fully functional $1500 FPGA boards for $599 when they could actually make legitimate profits selling them for $1500?

Well the build cost would be $1500+. Sale price would likely need to be $2000+ to cover R&D fraud, retail markup, defects, fixed costs, etc.

At $2K it is comparable to existing units. Some people like me would be interested simply because I would rather have 10 boards to build a 10GH FPGA cluster than up to 50 smaller/cheaper boards however at $2K it wouldn't be some amazing MUST BUY, GAME CHANGER item. Sales would likely be very very low. Most people would keep using existing GPU tech, or smaller cheaper FPGA boards.

I doubt they would sell even 100 in the first year, maybe not even 50.

Another way to look at it ... if you think they are a good product even at $1500? Why not sell them for $1000 ea? Hell if they don't sell out they could always drop the cost later. The $500 pricetag is a call to action.

Quote

YOU MUST BUY NOW OR YOUR CAREER AS A MINER IS OVER. DONT GET LEFT BEHIND .... BUY ... BUY .... BUY. STOP THINKING. WE ONLY HAVE 100 YOU KNOW HOW FAST THEY ARE GOING TO GO AT $500. COME ON MAN $500? YOU CAN'T EVEN GET A GPU RIG FOR THAT PRICE. HELL SELL YOUR GPUS AND BUY 10 OF THESE. DONT BE AN IDIOT BUY NOW. WE ACCEPT IRREVERSIBLE CURRENCY SO BUY BUY BUY TODAY!

fizzisist

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Quote from: P4man on November 17, 2011, 09:29:19 AM

Why oh why would anyone spend these kinds of resources on some unbelievably elaborate scam that involves selling fully functional $1500 FPGA boards for $599 when they could actually make legitimate profits selling them for $1500?

I'm not saying they would do it, but it just means that even a few live demos out there still might not be enough to convince me that this isn't a scam.

Along your same line of thinking, and I know this has been asked before, but why aren't they pricing this board at $1500?

P4man

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Quote from: fizzisist on November 17, 2011, 09:08:41 AM

Here's the really scary thing: if they're in it for the long con, they might as well sell a few of these boards at a loss to take the money from the hundreds of orders they'll get after a few people report that it works.

Why oh why would anyone spend these kinds of resources on some unbelievably elaborate scam that involves selling fully functional $1500 FPGA boards for $599 when they could actually make legitimate profits selling them for $1500?

Guys, seriously. Im all for being careful about possible scams, but is this www.ufos-aliens.co.uk ?

Inaba

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Quote

Would the power consumption give it away? Inaba, if you do ever get a test unit, make sure to check it with a Kill-a-watt.

Sure, I will measure power consumption as well.

fizzisist

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Quote from: DeathAndTaxes on November 17, 2011, 08:51:44 AM

2) Sadly if that is the next step in the scam they likely will get a huge flood of money. "See it works".

Here's the really scary thing: if they're in it for the long con, they might as well sell a few of these boards at a loss to take the money from the hundreds of orders they'll get after a few people report that it works.

Would the power consumption give it away? Inaba, if you do ever get a test unit, make sure to check it with a Kill-a-watt.

Quote from: DeathAndTaxes on November 17, 2011, 08:51:44 AM

1) We need to talk. I would rather have a 800MH to 1000MH board for $1500 than 3 lower priced boards with same output and MH/$ and I am sure I am not the only one. Would Vertex-5 300 be any good for hashing?

As I see it, the two problems with this are: 1) economies of scale and 2) if the board fails, you lose a lot more.

ngzhang

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Quote from: DeathAndTaxes on November 17, 2011, 08:51:44 AM

Quote from: ngzhang on November 17, 2011, 08:28:43 AM

you are right. give me 1500$, i can easy build a mining board by using 2X virtex6-240T, which is easily achieve 800-1000MH/s with that PCB size.

Two things.

1) We need to talk. I would rather have a 800MH to 1000MH board for $1500 than 3 lower powered boards for the same price and I am sure I am not the only one.

2) Sadly if that is the next step in the scam they likely will get a huge flood of money. "See it works".

1, why a big board is better than some smaller boards?
2, yes.

DeathAndTaxes

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Quote from: ngzhang on November 17, 2011, 08:28:43 AM

you are right. give me 1500$, i can easy build a mining board by using 2X virtex6-240T, which is easily achieve 800-1000MH/s with that PCB size.

Two things.

1) We need to talk. I would rather have a 800MH to 1000MH board for $1500 than 3 lower priced boards with same output and MH/$ and I am sure I am not the only one. Would Vertex-5 300 be any good for hashing?

2) Sadly if that is the next step in the scam they likely will get a huge flood of money. "See it works".

dunand

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The demo on november 25 makes me think about the perpertual motion device that Steorn tried to demonstrate.

ngzhang

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Quote from: deepceleron on November 17, 2011, 08:11:09 AM

Quote from: runeks on November 16, 2011, 08:21:09 AM

I'm glad they announced a public demonstration on the 25th though. At least we'll know approximately by then if it's a scam. Either they demonstrate on or around the 25th, or they are packing their bags right now and will be nowhere to be found on the 25th.

I don't know how a demonstration can be verified. When Steve Jobs unveiled the original Macintosh computer (64k), the demo unit that was up on stage was actually a one-of-a-kind 128k prototype, and the demo used all it's memory. The "$500" demo unit could have $1000 worth of FPGAs on it, or the miner source could have print "hashrate:", hash_rate*2, etc.

you are right. give me 1500$, i can easy build a mining board by using 2X virtex6-240T, which is easily achieve 800-1000MH/s with that PCB size.

Inaba

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As far as the hashrate being verified, it will be done through my pool. You might be able to printout a bogus hashrate, but my pool will not report a bogus hashrate as being the same.

For the hardware being something other than what's stated, well that is possible.

deepceleron

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Quote from: runeks on November 16, 2011, 08:21:09 AM

I'm glad they announced a public demonstration on the 25th though. At least we'll know approximately by then if it's a scam. Either they demonstrate on or around the 25th, or they are packing their bags right now and will be nowhere to be found on the 25th.

I don't know how a demonstration can be verified. When Steve Jobs unveiled the original Macintosh computer (64k), the demo unit that was up on stage was actually a one-of-a-kind 128k prototype, and the demo used all it's memory. The "$500" demo unit could have $1000 worth of FPGAs on it, or the miner source could have print "hashrate:", hash_rate*2, etc.

ngzhang

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Quote from: 2112 on November 16, 2011, 03:34:27 PM

Quote from: ngzhang on November 16, 2011, 02:21:37 PM

1, the DSP48As in spartan-6 is very slow.

Oh, one more suggestion that for sure ISE will not synthesize for you.

Adders in Spartan-6 are slow but you have free ROM lying around. How about decomposing the adders? Here's the classroom example:

You need 8+8->8 adder. You decompose it to two halves: (4*4)->(4+1) ROM table lookup and (4+4+1)->4 adder. You could either save on carry-lookahead logic or gain some timing margin that way. This is what I meant by "mangling the design to fit the resources".

This is the type of transformation that I haven't seen anyone trying. I'm not saying that they WILL work in Spartan-6. But they COULD work and they DID work for some ancient FPGA chips.

One thing is for sure: no amount of brute force smartXplor-ing will help to verify that. I'm not blaming anyone for using smartXplorer, but there are just the tricks of the trade that even the oldest computer ponies haven't learned yet.

Edit: Actually the ROM isn't free. You have to carry it around and it costs you by sucking the leakage current. How about putting it to work on the least-significant bits? It's a common sense, really.

not personal assault, but please, please, join this project, write some code, synthesis and run the full fpga design flow, and then review what you type above. maybe you will discover the gap between digital design curriculum and real engineering.

2112

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Quote from: ngzhang on November 16, 2011, 02:21:37 PM

1, the DSP48As in spartan-6 is very slow.

Oh, one more suggestion that for sure ISE will not synthesize for you.

Adders in Spartan-6 are slow but you have free ROM lying around. How about decomposing the adders? Here's the classroom example:

You need 8+8->8 adder. You decompose it to two halves: (4*4)->(4+1) ROM table lookup and (4+4+1)->4 adder. You could either save on carry-lookahead logic or gain some timing margin that way. This is what I meant by "mangling the design to fit the resources".

This is the type of transformation that I haven't seen anyone trying. I'm not saying that they WILL work in Spartan-6. But they COULD work and they DID work for some ancient FPGA chips.

One thing is for sure: no amount of brute force smartXplor-ing will help to verify that. I'm not blaming anyone for using smartXplorer, but there are just the tricks of the trade that even the oldest computer ponies haven't learned yet.

Edit: Actually the ROM isn't free. You have to carry it around and it costs you by sucking the leakage current. How about putting it to work on the least-significant bits? It's a common sense, really.

bulanula

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Quote from: P4man on November 16, 2011, 02:41:48 PM

Excuse me for interrupting you guys, but now that we finally have a few people who seem to know a thing or two about FPGAs, care to share your thoughts on this Butterfly Lab product? Feasible, unfeasible, scam or not, fpga, not fpga, asic, hybrid something else?

True. I personally think it is just impossible considering other projects are getting so much lower performance for a similar price. But, I know nothing about FPGAs so Tongue

. BFL prove me wrong and let Inaba there ASAP or else you are scammers and should be given the honorary "scammer" tag.

P4man

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Excuse me for interrupting you guys, but now that we finally have a few people who seem to know a thing or two about FPGAs, care to share your thoughts on this Butterfly Lab product? Feasible, unfeasible, scam or not, fpga, not fpga, asic, hybrid something else?

2112

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Quote from: ngzhang on November 16, 2011, 02:21:37 PM

1, the DSP48As in spartan-6 is very slow. with out pipeline, they only can run @ 80M. and there are only approx. 160 DSP48As, we need 1300 32bit adders for a fully unrolled design. and will lead a more difficult place & route.
2, this will also cause a more difficult place & route.
3, only 1/4 luts in spartan6 can run as SLR16s, so deploy long pipelines need to much registers, will cause a resource blow up.

why not start now? buy a Icarus FPGA development board (has 2 XC6SLX150 on it),, with pre-order, we will give you a gift pack, include a USB platform-cable, ISE 1.32 with full license , all these are less than 600$.

Thank you for your very valuable comment. However I'm not really interested in mining Bitcoin. I got involved in another project to reverse-engineer a faulty silicon that uses 2*SHA-256 in a HMAC-like fashion. I need more chip real estate to simulate the faults thus my interest is in at least Virtex-6 or Kintex-7, depending on the costs. Bitcoin is just an additional stimulant, it is good to be able to compare own work with other people's work, even if it isn't the exact equivalent.

One think I disagree with you is that deep-pipelines will require shift-register-type resources (SLR16 or such). With abundant BRAM as ROM one can store multiple copies of magic constants and save in the address encode/decode stages.

ngzhang

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Quote from: 2112 on November 16, 2011, 02:08:13 PM

Quote from: ngzhang on November 16, 2011, 01:42:36 PM

sorry, virtex-6 is highly different to spartan-6. in fact, spartan-6's routing resource is much less than virtex-6, so we all meet place & route difficulties even the fully pipeline design only take approx. 65% CLBs of the FPGA. still, about half of luts in spartan-6 is SLICEXs, these luts are like shit.

I mostly agree with you, with the exception where you call SLICEXs shit.

I don't know your HDL code and your design, but I've took a look at the ones published by ZTEX and fpgaminer. They both don't balance the use of available resources.

Three points worth checking:

1) use the adders in DSP48's
2) use the BlockRAM as ROM for the storage of the SHA-256 magic numbers instead of spreading them all over the implementation in LUTs
3) stream the pipeline stages: no matter how many stages, produce one result per clock (in honor of Mr. Cray)

Both Virtex-6 and Spartan-6 have some DSP48 and BlockRAM. Obviously they are different. But the two things I learned about FPGA design in school were:

1) you don't leave available resources unused, even if you have to mangle your source design.
2) watch the floor-plan for unnecessary long wires.

I had a long break in FPGA design, so I can't come up with quick specific answers. But I downloaded ISE evaluation, played a little with it and will most likely buy a ML605 or ML705 next year when they become available.

er... we also checked these things, but:

1, the DSP48As in spartan-6 is very slow. with out pipeline, they only can run @ 80M. and there are only approx. 160 DSP48As, we need 1300 32bit adders for a fully unrolled design. and will lead a more difficult place & route.
2, this will also cause a more difficult place & route.
3, only 1/4 luts in spartan6 can run as SLR16s, so deploy long pipelines need to much registers, will cause a resource blow up.

why not start now? buy a Icarus FPGA development board (has 2 XC6SLX150 on it),, with pre-order, we will give you a gift pack, include a USB platform-cable, ISE 1.32 with full license , all these are less than 600$.

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