My vague statement was correct. I don't reveal the full details on purpose.
In about 45 days (October batch) the SP30 will be 5.5 THs
(The limiting factor will remain the PSUs. The RockerBox has much more potential for over clocking)
This will be done without mask fix, just production tuning.
jtoomim more or less got it right.
Guy
My point is that TSMC will not have 'accidentally' botched 3 separate batches of lots (August, September, October). Remember, these are the same 28nm lines that Qualcomm and Broadcomm use. The notion that it is TSMC's 'fault' is simply a convenient excuse to a design mistake. I have no doubt that TSMC is capable of a retarget of your LVT devices to meet your original performance target. However, that 10% increase you were hoping to achieve with a post engineering run retarget has disappeared. Guy, I applaud your ability to perform damage control.
jtoomim, yes my name is intentionally chosen to troll. That doesn't delegitimize my arguments. Source: I run fab sync for a major US semiconductor company. You don't have to believe me, but you can do your own research on the topic.
I don't blame TSMC (or GUC). The ASICs we got and getting are within TSMC acceptence criteria.
My hands are tied here. With one WAT graph I can prove my claims, but I won't.
You're welcome to email me privately. If you're not working for a competition, I'll disclose the info after signing mutual NDA.
It's much more than 10% increase and it's not post engineering.
I'm as transparent as I can be here. No damage control, but simple truth.
Even with the underperforming slow ASICs we have the best miner in the market.
Cheers,
Guy