In the SP30 we use heat sink per ASIC. Due to mechanical stress issues, we preferred not to use large shared heat-sinks on top of the FCBGA ASICs
Does this mean there will be additional heatsinks on top of the chips aswell as under the board or only on top of the chips?
If the second option, will you be looking at higher thermal conductivity ie. copper heatsinks to compensate for the lower surface area or will you be making the heatsinks with a higher surface area?