ASIC shipping dates - page 6. | Bitcointalksearch.org

abeaulieu

sr. member

Activity: 295

Merit: 250

Quote from: MrTeal on December 12, 2012, 12:32:06 PM

Quote from: abeaulieu on December 12, 2012, 11:59:55 AM

Quote from: greyhawk on December 12, 2012, 05:47:49 AM

Quote from: bitboyben on December 12, 2012, 03:05:28 AM

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

No, back in the day you would see PCBs were actually hand drawn.

I understand that, but that's not what they're talking about. (Even intel did the hand-drawing of their processors on giant blown up transparent film top seperate layers in the early days.)

MrTeal

legendary

Activity: 1274

Merit: 1004

Quote from: abeaulieu on December 12, 2012, 11:59:55 AM

Quote from: greyhawk on December 12, 2012, 05:47:49 AM

Quote from: bitboyben on December 12, 2012, 03:05:28 AM

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

No, back in the day you would see PCBs were actually hand drawn.

abeaulieu

sr. member

Activity: 295

Merit: 250

Quote from: greyhawk on December 12, 2012, 05:47:49 AM

Quote from: bitboyben on December 12, 2012, 03:05:28 AM

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

Soros Shorts

donator

Activity: 1617

Merit: 1012

Quote from: bitboyben on December 12, 2012, 03:05:28 AM

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

I'm guessing what they meant was that the place and route phase of the design was done manually instead of using automated tools. From a design perspective this implies higher performance but with additional risk of errors.

greyhawk

hero member

Activity: 952

Merit: 1009

Quote from: bitboyben on December 12, 2012, 03:05:28 AM

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

bitboyben

sr. member

Activity: 330

Merit: 250

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

Bogart

legendary

Activity: 966

Merit: 1000

Quote from: DutchBrat on December 11, 2012, 12:39:22 PM

If/when the foundry is done with BFL's chips in 30 days they need to be shipped to the USA, tested and by BFL, packaged, shipped and what not.

Actually the bare dies will first need to be packaged, which probably will not happen at the foundry.

Then the packaged chips will need to be shipped across an ocean, pass through Customs, and finally arrive at BFL HQ, where they will test them.

Then, *only if* they pass all of the tests, can BFL begin putting them onto boards, working out the firmware, and maybe packing and shipping a few of them out the door. That's assuming their inhouse pick-and-place machine and reflow oven work, and have competent operators. The bulk of the chips would get shipped right out the door again, along with the rest of the components, to the board production house, to be done up onto boards en masse.

Quote from: Roy Badami on December 11, 2012, 03:37:03 PM

Quote from: ChipGeek on December 11, 2012, 11:36:51 AM

"Tape out" is the term for sending the design to the fab. (Name has stuck from back in the days when a computer tape was sent by FedEx.

I always thought the name came from the fact that in the earliest integrated circuits the masks were produced by hand using an opaque sticky tape on a transparent film. A process known as tape-out, which you obviously didn't start until you'd completed the design.

Tape-out refers to the final step in production immediately before the photomasks are made.

Your design can be at the foundry, but until they're ready to make the masks, it's not said to be at tape-out stage.

bcpokey

hero member

Activity: 602

Merit: 500

Quote from: ModusPwnd on December 11, 2012, 03:26:38 PM

Nice to see this thread. Its hard to sift through the posts and get a clear picture. So many claims of people being a troll... Roll Eyes

People keep using that word. I dont think it means what they think it means. Cheesy

Its nice to keep the original post updated with 'official' claims by the sellers and let the speculation as to further delays be in the replies.

Agreed, I'm not invested enough to sift through all the forums and redundant posts of this and rebuke to that. So I appreciate a thread that will track this stuff for me.

The next thing I'd kind of like to see, just for sociological purposes, would be a thread tracking the general sentiment of customers/detractors throughout. For example:

July -- Hooray we gonna get ASICs! // ASICs cant be real!
August -- Cant wait for those ASICs! // You're not gonna get them, scam!
September -- OMG ASICs almost here! // I bet you that you won't get them!
October -- ASICs delayed? That's ok, its gonna be awesome! // Ha told you suckers!
November -- Another ASIC delay? Hmm... well still hoping for the best // Look at those delays! Chumps!
December -- Another delay, but I still have faith // Haw haw scammity scam scam scam!
Jan -- ?? // ??

Roy Badami

hero member

Activity: 563

Merit: 500

Quote from: ChipGeek on December 11, 2012, 11:36:51 AM

"Tape out" is the term for sending the design to the fab. (Name has stuck from back in the days when a computer tape was sent by FedEx.

I always thought the name came from the fact that in the earliest integrated circuits the masks were produced by hand using an opaque sticky tape on a transparent film. A process known as tape-out, which you obviously didn't start until you'd completed the design.

roy

ModusPwnd

member

Activity: 546

Merit: 10

Nice to see this thread. Its hard to sift through the posts and get a clear picture. So many claims of people being a troll... Roll Eyes

People keep using that word. I dont think it means what they think it means. Cheesy

Its nice to keep the original post updated with 'official' claims by the sellers and let the speculation as to further delays be in the replies.

DutchBrat

hero member

Activity: 868

Merit: 1000

If/when the foundry is done with BFL's chips in 30 days they need to be shipped to the USA, tested and by BFL, packaged, shipped and what not.

So add 2 weeks minimum from 30 days from now before anyone has a BFL product delivered on their doorstep.

And yes, the foundry might be quicker, but it also might be slower....

ChipGeek

full member

Activity: 198

Merit: 100

Quote from: gmaxwell on December 11, 2012, 12:00:50 AM

Quote

When pressed for a reason why, I have been told that because this is a very dense, hand routed design they are afraid of making a mistake and have required extra checking and sign offs which has slowed down the whole process considerably. They don't want to be on the hook financially for having to redo the whole order.

Am I misreading this, or does this sound like they won't be at tape-out until 30 days from now? (What careful checking of hand routed design will you be doing once the masks are being printed?).

"Tape out" is the term for sending the design to the fab. (Name has stuck from back in the days when a computer tape was sent by FedEx. Now it's done with ftp over the interwebs.) Then the fab checks the files for errors then makes the masks and begins making the wafers. My interpretation is that BFL sent the design to the fab days / weeks / months ago. What is not clear to me is if the fab has started masks or wafers yet.

My best guess is that masks are done and wafers are (just) started. Also a guess: extra delays came from questions or problems with the design that caused problems in making the masks.

creativex

sr. member

Activity: 434

Merit: 250

Unicorn blood spilled on the mask?

gmaxwell

staff

Activity: 4284

Merit: 8808

Quote

When pressed for a reason why, I have been told that because this is a very dense, hand routed design they are afraid of making a mistake and have required extra checking and sign offs which has slowed down the whole process considerably. They don't want to be on the hook financially for having to redo the whole order.

Am I misreading this, or does this sound like they won't be at tape-out until 30 days from now? (What careful checking of hand routed design will you be doing once the masks are being printed?).

wdBTCtrader

newbie

Activity: 42

Merit: 0

Quote from: 420 on December 10, 2012, 10:56:48 PM

Don't expect any ASIC's in any customers hands before February 1st.
Im making my prediction

Has anyone started a pool?

abeaulieu

sr. member

Activity: 295

Merit: 250

delays are coming in hot

wdBTCtrader

newbie

Activity: 42

Merit: 0

Quote from: Morblias on December 08, 2012, 10:55:37 PM

It is very hard to find information on shipping dates due to multiple forums and announcements being thrown everywhere. This thread is to consolidate it all into 1 thread.

Avalon: ETA January 14th, 2013 Source: https://bitcointalksearch.org/topic/announcement-avalon-asic-development-status-batch-1-120184

Quote

Avalon instead gave an very conservative estimate but now is scheduled to ship even earlier at Jan. 14th 2013

bASIC: ETA mid January, 2013 Source: https://www.btcfpga.com/forum/index.php?topic=125.0

Quote

I am planning now on a mid January release date

BFL: ETA mid January, 2013 Source: https://forums.butterflylabs.com/bfl-forum-miscellaneous/519-10-dec-2012-bfl-asic-update.html#post7783

Quote

After talking with our liaison tonight and still having not received a final confirmation date, we were as tired of this as everyone else is, so we continued to push for a date and they gave us 30 days from today

This thread is not meant to flame any companies in any way. Please keep that stuff out of here or I will delete this thread. If you see an announcement from any company please post it here with a source and I will update it.

thanks for the update.

creativex

sr. member

Activity: 434

Merit: 250

Awww don't say that. BTCFPGA needs to ship in January. Grin

420

hero member

Activity: 756

Merit: 500

Don't expect any ASIC's in any customers hands before February 1st.
Im making my prediction
http://betsofbitco.in/item?id=1003

No ASIC Manufacturer will deliver an ASIC miner to a customer before February 1st, 2013

You have submitted this statement which is awaiting approval. It is not available for betting or public display yet.

Morblias

hero member

Activity: 576

Merit: 500

Updated BFL to mid January:

https://forums.butterflylabs.com/bfl-forum-miscellaneous/519-10-dec-2012-bfl-asic-update.html#post7783

Quote

After talking with our liaison tonight and still having not received a final confirmation date, we were as tired of this as everyone else is, so we continued to push for a date and they gave us 30 days from today.

It's an update I'm not happy about at this point and it may very well be that things will wrap up sooner than that

Topic: ASIC shipping dates - page 6. (Read 19841 times)