Topic: BFL ASICs featured in issue #4 of Bitcoin Magazine (Read 4854 times)
The article definately alludes to the chips running 50% theoretical I would guess another 50% (80-90Ghash for SC) would be safe with the right cooling set up. It doesn't really excite me as much as it used to because, hey everyone else is going to do it too.
Well, they have the waterblock heatsink that could be used. I bet that'd get some nice overclockz going.
In the article is mentioned that these chips can in theory, run up to 16Gh/s max., but will not live long if pumped up to this. What is needed to overclock these single SC's chips to maybe 10-12Gh/s a piece, so a single would do 80-96Gh/s? Just the right mining software, or is a modded firmware needed?
The toggle-rate is so high that they are running the chips with much lower frequency that you would normally expect to run 65nm designs on to protect them from overheating. Had they gone with other package (eg. flip-chip), they could've run them at much higher clocks.
Can the chip package be changed to a more thermally efficient design in a subsequent production run of chips without having to make a new mask, and incur a whole new set or NRE costs?
This is an excellent question. Here's my educated guess for an answer: It is likely that a new mask would need to be made for the top layer at a minimum.
Edit: Yes flip-chip would be a much better thermal design. We do flip-chip for our custom chips.
The toggle-rate is so high that they are running the chips with much lower frequency that you would normally expect to run 65nm designs on to protect them from overheating. Had they gone with other package (eg. flip-chip), they could've run them at much higher clocks.
Can the chip package be changed to a more thermally efficient design in a subsequent production run of chips without having to make a new mask, and incur a whole new set or NRE costs?
My issue came yesterday 
Read the article and now i'm thrilled to see an actual Product out and hashing!
If that happens i might consider buying one or two singles SC; or even more! (i won't preorder ..... that is not about to change since i don't like that "tactics" of bfl. Maybe if you had called it community funding with preorder guarantee back then, i would have.....
)
Read the article and now i'm thrilled to see an actual Product out and hashing!
If that happens i might consider buying one or two singles SC; or even more! (i won't preorder ..... that is not about to change since i don't like that "tactics" of bfl. Maybe if you had called it community funding with preorder guarantee back then, i would have.....
) 
Better later than never
WE just have to wait and see.
WE just have to wait and see.
Regarding the chip being hardcopy or easypath or any other structured ASIC, please be advised that none of those chips come in small packages. They are all 480pin or above (BGA chips), not QFN. The reason behind it is that most industries going after hardcopy or easypth are the ones using the high IO count FPGA version of those chips (which are very expensive for a mass-produced product).
I hope this clarifies the situation.
Regards,
BFL-Engineer
I hope this clarifies the situation.
Regards,
BFL-Engineer
This is more like it: http://bitcoinmagazine.net/bfl-confirms-65nm-process-for-sc-lineup/
I guessed right, 65nm, big surprise?
The disturbing thing is they are using Full Custom ASIC, at 65nm process node, at 60watts. (@60GH/s)
The competitor (bASIC) is using structured ASIC I believe and is below the 100watt mark on a 90nm process node. (@54GH/s)
Some leaked pictures show that it might be at around 58 to 60watts. But the caption was removed so it is hard to figure out if true or not.
Either way, for a smaller process node...not as efficient as it should be. Perhaps I am missing something....?
The toggle-rate is so high that they are running the chips with much lower frequency that you would normally expect to run 65nm designs on to protect them from overheating. Had they gone with other package (eg. flip-chip), they could've run them at much higher clocks.
What leaked pictures are you referring to? URL?
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
Of course they won't admit that they are using it.
I don't see 65nm on the product page: http://goo.gl/LhjH7
Ok they probably are not using Altera Hardcopy.
Perhaps Xilinx Easypath? You see there are several companies who off fpga conversion "ASICs", I don't know them all.
You are wrong again, ElectricMucus. The few times I have made predictions(*) against "mainstream thoughts" in the Bitcoin world, I have always been right, and I will tell you: I predict SC is not based on a FPGA-to-ASIC chip.
(*) Just a few examples: I correctly estimated HD 7000's MHash per Joule before release, from theoretical computations based on its known process node. I correctly predicted pirateat40 was running a Ponzi when many refused to believe. I correctly predicted 65nm for the SC lineup. And I seem to be on a path to win my SC mining efficiency bet when people where ignorant enough to bet 50 BTC against me.
^ Prepare yourself to be appended to this list in the near future. I have the track record to justify my confidence
So is the lower the nm, the better?
so if someone came out with 20nm, that would be faster or use electricity than a 45nm chip?
Probably both. so if someone came out with 20nm, that would be faster or use electricity than a 45nm chip?
So is the lower the nm, the better?
so if someone came out with 20nm, that would be faster or use electricity than a 45nm chip?
so if someone came out with 20nm, that would be faster or use electricity than a 45nm chip?
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
Of course they won't admit that they are using it.
I don't see 65nm on the product page: http://goo.gl/LhjH7
Ok they probably are not using Altera Hardcopy.
Perhaps Xilinx Easypath? You see there are several companies who off fpga conversion "ASICs", I don't know them all.
Could you point us to which Hardcopy family members use a 68 pin 11mmx11mm QFN?
http://www.altera.com/devices/asic/hardcopy-asics/about/hrd-index.html
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
Of course they won't admit that they are using it.
I don't see 65nm on the product page: http://goo.gl/LhjH7
Ok they probably are not using Altera Hardcopy.
Perhaps Xilinx Easypath? You see there are several companies who off fpga conversion "ASICs", I don't know them all.
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
Of course they won't admit that they are using it.
I don't see 65nm on the product page: http://goo.gl/LhjH7
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
You're saying they are lying about creating a full custom ASIC?Of course they won't admit that they are using it.
Yes
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
You're saying they are lying about creating a full custom ASIC? Of course they won't admit that they are using it.
Altera Hardcopy is "65nm" too.
Of course they won't admit that they are using it.
Of course they won't admit that they are using it.
This is more like it: http://bitcoinmagazine.net/bfl-confirms-65nm-process-for-sc-lineup/
I guessed right, 65nm, big surprise?
The disturbing thing is they are using Full Custom ASIC, at 65nm process node, at 60watts. (@60GH/s)
The competitor (bASIC) is using structured ASIC I believe and is below the 100watt mark on a 90nm process node. (@54GH/s)
Some leaked pictures show that it might be at around 58 to 60watts. But the caption was removed so it is hard to figure out if true or not.
Either way, for a smaller process node...not as efficient as it should be. Perhaps I am missing something....?
This is more like it: http://bitcoinmagazine.net/bfl-confirms-65nm-process-for-sc-lineup/
I guessed right, 65nm, big surprise?
The disturbing thing is they are using Full Custom ASIC, at 65nm process node, at 60watts. (@60GH/s)
The competitor (bASIC) is using structured ASIC I believe and is below the 100watt mark on a 90nm process node. (@54GH/s)
Some leaked pictures show that it might be at around 58 to 60watts. But the caption was removed so it is hard to figure out if true or not.
Either way, for a smaller process node...not as efficient as it should be. Perhaps I am missing something....?
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