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Topic: BFL BitForce SC Firmware source code - page 5. (Read 28021 times)

erk
hero member
Activity: 826
Merit: 500
June 16, 2013, 08:33:33 PM
#17
Does it matter what kind of JTAG programmer I get? Interested in overclocking my little single board.

Also, has anyone looked at the PCB designs? Is it possible to purchase BFL chips and manually add them to a Little Single board and up its chip count from 8 to 16?
How are you going to melt the solder?
donator
Activity: 2352
Merit: 1060
between a rock and a block!
June 16, 2013, 08:31:42 PM
#16
Awesome! Luke, you need any pizza deliveries, you let us know, OK?  Grin
sr. member
Activity: 266
Merit: 250
aka 7Strykes
June 16, 2013, 08:27:01 PM
#15
Does it matter what kind of JTAG programmer I get? Interested in overclocking my little single board.

Also, has anyone looked at the PCB designs? Is it possible to purchase BFL chips and manually add them to a Little Single board and up its chip count from 8 to 16?
full member
Activity: 224
Merit: 100
June 16, 2013, 06:54:51 PM
#14
With the speed of the community I wonder how many days until we have DYI projects with production ready mining PCB etc. exciting!
erk
hero member
Activity: 826
Merit: 500
June 16, 2013, 06:51:21 PM
#13
BFL have also released a PCB design, which was mighty quick and kind of them.
Unfortunately  I can't read that file type, it was done in Altium DXP 2008.

https://forums.butterflylabs.com/announcements/3295-bitforce-sc-pcb-schematics.html
legendary
Activity: 4592
Merit: 1851
Linux since 1997 RedHat 4
June 16, 2013, 05:59:01 PM
#12
I thought this one looked interesting now that I've had a quick look through ...

PROTOCOL_REQ_SET_FREQ_FACTOR
ZVX

(and ZKX to get it)

HostInteractionProtocols.c
Protocol_set_freq_factor()

But it forces it on all chips, no option to choose which chip ...
So I wonder if it is an old command ... and is in the Jalapeno firmware 1.0.0 ...

Have to have a look later ...
full member
Activity: 227
Merit: 100
June 16, 2013, 10:54:57 AM
#11
Probably.

In my limited understanding of it so far, the firmware sets a target hashrate and then manages all cores wrt to error rate to maintain that. Sooooo... probably don't want to meddle too much for now and just try upping the target hashrate, and keep the cores cool so error rate minimised.

Yes the firmware performs diagnostics on start-up, determining chip frequency based on invalid/valid nonces generated by that chip.


Regards,
member
Activity: 115
Merit: 10
BTC for a better world
June 16, 2013, 10:11:10 AM
#10
Hi Luke-Jr

On behalf of the BTC community starting up from South Africa, we are looking forward following your posts.
This is exciting work man!  Keep it up.

Regards
dawie
 
hero member
Activity: 518
Merit: 500
Hodl!
June 16, 2013, 08:23:00 AM
#9
Probably.

In my limited understanding of it so far, the firmware sets a target hashrate and then manages all cores wrt to error rate to maintain that. Sooooo... probably don't want to meddle too much for now and just try upping the target hashrate, and keep the cores cool so error rate minimised.
sr. member
Activity: 385
Merit: 250
June 16, 2013, 01:43:49 AM
#8
i got a xilinx jtag programmer, i have a couple of jalapenos i already open one i see the jtag connector, it is possible to do something like OC the miners?
legendary
Activity: 2576
Merit: 1186
June 16, 2013, 12:25:56 AM
#7
does this mean we can flash our current miners?  Overclock?
You'll need to disassemble it and connect a JTAG programmer, but other than that, I believe so...

Step one when I get around to poking at this, will be to get it building with standard GCC (or at least free software).
full member
Activity: 148
Merit: 100
June 16, 2013, 12:24:08 AM
#6
does this mean we can flash our current miners?  Overclock?
full member
Activity: 227
Merit: 100
June 15, 2013, 06:32:45 PM
#5
This is an Atmel Studio project solution.


Regards
legendary
Activity: 2058
Merit: 1452
June 15, 2013, 06:31:33 PM
#4
What's with the weird extensions?

BitForce_SC.atsln - visual studio solution
BitForce_SC.atsuo - visual user options
vip
Activity: 574
Merit: 500
Don't send me a pm unless you gpg encrypt it.
June 15, 2013, 06:20:41 PM
#3
BFL has entrusted me with releasing the source code for their BitForce SC firmware, beginning with version 1.2.5.
Tomorrow, I will be organizing the historical code into a proper git repository to compliment this and aide in further open development.

Binary: hex (sigs)
Source: tbz2 | zip (sigs)

Witnessed.

Code:
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256

These are the source code and binary provided to me by Butterfly Labs.
I have not (yet) reviewed or audited the code myself.

12a4f47100f2dc26bd278f0b1d96b62226d666e7de49b5a97e92242dac0504c9  BitForce_SC-1.2.5.hex
44d4100a36e408b8f6d4891897d4487f3e2aec846b945674c7fb7f8f60d517ba  BitForce_SC-1.2.5.tbz2
235d28bb7c10e57a2dfcd90ce4d0572c8ad3e601b1bba205ba5d58a2ee84b897  BitForce_SC-1.2.5.zip
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.20 (GNU/Linux)

iQQcBAEBCAAGBQJRvPSSAAoJEL0ClCQh9Iif9DMgAKXPExVnB0uJP2lGcXf0S7Es
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sfDFlR6hf/QLY4/HD4seuxa497qZVqaZBx58m4VvWog7N54ndUJ8IQSFZQuEjZs=
=3Yqk
-----END PGP SIGNATURE-----
legendary
Activity: 2576
Merit: 1186
June 15, 2013, 06:20:23 PM
#2
(reserved)
legendary
Activity: 2576
Merit: 1186
June 15, 2013, 06:07:59 PM
#1
BFL has entrusted me with releasing the source code for their BitForce SC firmware.

Latest version, 1.2.9:
Note, I have not made any changes or even read the code for this yet.
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