I guess such calculations are not so easy to do, and depend a lot on the manufacturing process (Ex: 40nm vs 28nm). So probably they didn't have done right until now. It could be even possible that the original calculations were done with a very conservative manufacturing process (40nm) and finally they managed, to manufacture the chips with a better technology (28nm).
You are dreaming if you think BFL (or anyone else for that matter) is using 28 or 40 nm technology.
Why you say that is impossible? Nowadays practically all semiconductor manufacturing plants have technology to manufacturer chips with 28nm.
Of course they are not building the chips (that's just impossible) they are outsourcing the manufacturing process to companies like TSMC
For example Altera (a very well-know FPGA manufacturer) offer a service that allows you to copy your design from an Altera FPGA to an ASIC with 28nm or 40nm
https://en.wikipedia.org/wiki/Altera#ASICshttp://www.altera.com/devices/asic/hardcopy-asics/about/hrd-index.htmlIf NRE is on the order of >$100,000 USD for 130 nm ASICs, how can you expect BFL to afford 28/40nm type stuff that only the largest of companies can afford?
I don't know how much money BFL was able to raise, but 1M sounds feasible to me.
Of course I am only speculating, I don't know about real numbers.
Probably some of you will find this page useful
http://opencores.org/forum,OpenRISC%20-%20ASIC%20Funding,0,4358 where OpenRISC talks about minimum orders for different ASIC manufacturing process.
The point of the discussion was about how they managed to bump the original specifications up to a 50% more while keeping the original cost.
And, perhaps is because of this, they originally targeted one manufacturing process of XXXnm, and they finally raised more money than expected so they were able to go for YYYnm process which allowed them to boost the performance and lower the power consumption.
It would be nice to know how much nm will use the manufacturing process of the BF ASICs.
Regards