Dammit I feel bad now.
Topic: Community Miner Design Discussion - page 9. (Read 34221 times)
link deleted by alani123
Dammit I feel bad now.
Dammit I feel bad now.
...are you kidding? Perhaps, I misunderstood, or it is true in chip design, but it (what the prof said) makes absolutely no sense in other sciences, like physics, chemistry or biology.
Yeah? In which science you will get recognition for publishing a paper that would effectively say: "we worked hard trying to improve previously published results, but failed"? It is a common problem that gaining a negative knowledge doesn't get you promoted.The only way to get promoted is to improve or falsify somebody's else results. And falsification may brand you a spoilsport.
Reading through their whitepaper is answering a lot questions I've been accumulating in the back of me mind on just what a mining chip Wizard is doing behind its curtain. Well, under its hood actually... Ever since Sidehack mention at least passing interest in mebe learning chip design my Muse's cat, Curiosity, has been bugging me about it... 
EDIT: Thoughts on https://arxiv.org/ftp/arxiv/papers/1604/1604.00575.pdf from ASICboost on their idea? So far looks like they say they have a different and more efficient use of gates achieved by using a different logic structure/flow than other folks.
Only 1 person I can think of can give me insight as to a 'yesss......' or , 'meh' and and they are not into BTC per se but are Wizard of chip-level data flow the likes I've rarely seen.
Gotta say ever since making a chip was brought up my natural curiosity into everything got me to thinking about what goes on inside a mining ASIC and methinks that paper is answering a some of that.
One of my professors at school had an advice for young scientists: If the numbers are good: multiply them by 2 and publish widely. If the numbers are bad: divide them by 10 and hide in the bottommost drawer.EDIT: Thoughts on https://arxiv.org/ftp/arxiv/papers/1604/1604.00575.pdf from ASICboost on their idea? So far looks like they say they have a different and more efficient use of gates achieved by using a different logic structure/flow than other folks.
Only 1 person I can think of can give me insight as to a 'yesss......' or , 'meh' and and they are not into BTC per se but are Wizard of chip-level data flow the likes I've rarely seen.
Gotta say ever since making a chip was brought up my natural curiosity into everything got me to thinking about what goes on inside a mining ASIC and methinks that paper is answering a some of that.
arXiv is a pre-print archive, there's no peer review of the papers published there. The peer review could however happen later.
...are you kidding? Perhaps, I misunderstood, or it is true in chip design, but it (what the prof said) makes absolutely no sense in other sciences, like physics, chemistry or biology.
Just tossing this out there to see where the cow pie plops
you said it needs high level pre conditioning of the data the actual sha hashing cores handle and that cpu-type of operation normally is not present in each ASIC. Very true now and in the past but what if say a tiny ARM core or other MC was put inside of each ASIC to do that? That would be very easy to do these days. Possibilities there?
I think that you are still thinking at a too low level.you said it needs high level pre conditioning of the data the actual sha hashing cores handle and that cpu-type of operation normally is not present in each ASIC. Very true now and in the past but what if say a tiny ARM core or other MC was put inside of each ASIC to do that? That would be very easy to do these days. Possibilities there?
My reading of Timo Hanke's paper is that it is some high-level algebraic-combinatorial transformation that has to be done only once, very early in the design stage. Once that transformation is done no further software/hardware/logic would be required in the implementation.
Edit: Let me put it in different words. The Bitcoin SHA256D hash can be written as one very long equation with 80*8=640 binary variables. Then the conventional miner changes only 32 of those 640 binary variables (32-bit nonce). Each hashing core would be a hardware implementation of that single very long equation, but for all cores on the chip the other 76*8=608 bits are the same.
Timo Hanke apparently found a mathematical way of reorganizing that computation by changing other bits out of the 640 binary input variables. His transformation seems to be some sort of common subexpression elimination when that very long equation is written multiple times. So in other words the hashing cores in a chip would be no longer independent but would have some shared parts in groups of e.g. 16 for 23.4% total savings versus 16 completely independent cores.
My understanding is that it should be completely possible to explain his transformation with mathematical symbols. Be he had chosen to not publish the details. It is possible that those details could be prohibitively long for normal scientific publication, like hundreds of pages.
Just tossing this out there to see where the cow pie plops
you said it needs high level pre conditioning of the data the actual sha hashing cores handle and that cpu-type of operation normally is not present in each ASIC. Very true now and in the past but what if say a tiny ARM core or other MC was put inside of each ASIC to do that? That would be very easy to do these days. Possibilities there?
you said it needs high level pre conditioning of the data the actual sha hashing cores handle and that cpu-type of operation normally is not present in each ASIC. Very true now and in the past but what if say a tiny ARM core or other MC was put inside of each ASIC to do that? That would be very easy to do these days. Possibilities there?
I take that as a 'meh' vote 
I thought the gist of what the paper says sounded familiar. In early 2014 when I was getting into mining the Cointerra website made mention of stuff like that for enhanced performance vs others.
I thought the gist of what the paper says sounded familiar.
Reading through their whitepaper is answering a lot questions I've been accumulating in the back of me mind on just what a mining chip Wizard is doing behind its curtain. Well, under its hood actually... Ever since Sidehack mention at least passing interest in mebe learning chip design my Muse's cat, Curiosity, has been bugging me about it...
EDIT: Thoughts on https://arxiv.org/ftp/arxiv/papers/1604/1604.00575.pdf from ASICboost on their idea? So far looks like they say they have a different and more efficient use of gates achieved by using a different logic structure/flow than other folks.
Only 1 person I can think of can give me insight as to a 'yesss......' or , 'meh' and and they are not into BTC per se but are Wizard of chip-level data flow the likes I've rarely seen.
Gotta say ever since making a chip was brought up my natural curiosity into everything got me to thinking about what goes on inside a mining ASIC and methinks that paper is answering a some of that.
Firstly: ASICboost isn't any company. It is Timo Hanke, a German scientist who was the only technical employee of Cointerra that was willing to show his face in their marketing video (aside from the CEO). My quick take on the guy: he was forced to work/shill for Cointerra due to some immigration paperwork screwup/problem. His permanent residency and employment seems to be in Germany. The ASICboost publication seems like a quick way to salvage his academic career in Germany. It is also very dirty work, the PDF still has embedded links to http://www.lucidchart.com/ website to allow editing the figures.EDIT: Thoughts on https://arxiv.org/ftp/arxiv/papers/1604/1604.00575.pdf from ASICboost on their idea? So far looks like they say they have a different and more efficient use of gates achieved by using a different logic structure/flow than other folks.
Only 1 person I can think of can give me insight as to a 'yesss......' or , 'meh' and and they are not into BTC per se but are Wizard of chip-level data flow the likes I've rarely seen.
Gotta say ever since making a chip was brought up my natural curiosity into everything got me to thinking about what goes on inside a mining ASIC and methinks that paper is answering a some of that.
Other than this the paper is too short on information to make an informed decision. First of all: it has nothing to do with ASICs, it is pure marketing. This is some sort of high-level transformation that could be reproduced in CPU/GPU/FPGA miner. But those are no longer commercially competitive, therefore the reference to the ASICs.
There's only one table (Fig.6) showing percentage gains up to 23.4%. But those seem to be purely combinatorial figures, there's no estimation of saved power or lowered gate counts.
One of my professors at school had an advice for young scientists: If the numbers are good: multiply them by 2 and publish widely. If the numbers are bad: divide them by 10 and hide in the bottommost drawer.
arXiv is a pre-print archive, there's no peer review of the papers published there. The peer review could however happen later.
Who is "they"? Either you know something I don't or you're mistaken.
My bad, assumed to much from philipma1957 post about mail from Canaan.I offered to run a group buy with blockC which would be like the other two I did with the a6.
Right I do not have any info on new chips for sidehack.
So far as I know no one is selling any to at the moment.
I have not signed any NDA with anyone as my expertise is not in building gear.
I am a facilator more then any thing else. I also choose to do this with close to zero profit.
As my goal is promoting mining for small players.
Small is under 10k usd.
AFAIK AsicBoost is a design solution for chip makers, and since this project is about utilising ready made chips it is most likely irrelevant.
Not necessarily...Reading through their whitepaper is answering a lot questions I've been accumulating in the back of me mind on just what a mining chip Wizard is doing behind its curtain. Well, under its hood actually... Ever since Sidehack mention at least passing interest in mebe learning chip design my Muse's cat, Curiosity, has been bugging me about it...
EDIT: Thoughts on https://arxiv.org/ftp/arxiv/papers/1604/1604.00575.pdf from ASICboost on their idea? So far looks like they say they have a different and more efficient use of gates achieved by using a different logic structure/flow than other folks.
Only 1 person I can think of can give me insight as to a 'yesss......' or , 'meh' and and they are not into BTC per se but are Wizard of chip-level data flow the likes I've rarely seen.
Gotta say ever since making a chip was brought up my natural curiosity into everything got me to thinking about what goes on inside a mining ASIC and methinks that paper is answering a some of that.
AFAIK AsicBoost is a design solution for chip makers, and since this project is about utilising ready made chips it is most likely irrelevant.
Who is "they"? Either you know something I don't or you're mistaken.
My bad, assumed to much from philipma1957 post about mail from Canaan. 
They already are in contact.
And you know this how?Last posts from kilo and sidehack are about waiting the sample chips from Bitfury.
They haven't posted info about being in contact with Canaan Creative.
Who is "they"? Either you know something I don't or you're mistaken.
They already are in contact.
Would contacting Canaan Creative and ask them about the upcoming 16nm Avalon chips be any good idea?
I made just for fun, a 3D model copy of the S1's frame plates using AutoCAD software provided by my university of applied sciences.
I thought to share the result here if someone else has use for it too.
I got these frame plates, heatsinks, screws and Delta 120mm fan.
Only thing left is community miner boards +controller like raspberry pi maybe(?).
The ones that I got printed had a little fault, they didn't come with even thicknesses (sides, bottom).
The material used here is PLA.
Design should be good for air flow. I actually got little lower temps now with S1
Nice! I thought to share the result here if someone else has use for it too.
I got these frame plates, heatsinks, screws and Delta 120mm fan.
Only thing left is community miner boards +controller like raspberry pi maybe(?).
The ones that I got printed had a little fault, they didn't come with even thicknesses (sides, bottom).
The material used here is PLA.
Design should be good for air flow. I actually got little lower temps now with S1
Just a suggestion for a good way to gather funds (if it's needed of course). Www.patreon.com. I've seen a few guys on YouTube use it to fund videos etc.
I made just for fun, a 3D model copy of the S1's frame plates using AutoCAD software provided by my university of applied sciences.
I thought to share the result here if someone else has use for it too.
I got these frame plates, heatsinks, screws and Delta 120mm fan.
Plus this good old S1, so it makes two possible community board miners.
Only thing left is community miner boards +controller like raspberry pi maybe(?).
The ones that I got printed had a little fault, they didn't come with even thicknesses (sides, bottom).
The material used here is PLA.
Design should be good for air flow. I actually got little lower temps now with S1
Some pictures (click for bigger ver.):
3D model:
3D printed parts (3mm thickness version):
Original Antminer S1:
S1 fitted with 3D printed frame parts, fan attached with sheet metal screws:
Download links for .STL file (3D printing):
S1_FRAME_PART_THICKNESS_3mm_by_HagssFIN.stl - https://mega.nz/#!pt0EyYzZ!oVD9ay2Jsr0RUiQ8PImCvIyql4nRMIXMSUXn7F8Fpkk
S1_FRAME_PART_THICKNESS_5mm_by_HagssFIN.stl - https://mega.nz/#!kx81jBqJ!OYJhh-pY053sQEV6wDMu_UmzrE1OrBHOBv_lj8cGFAw
I thought to share the result here if someone else has use for it too.
I got these frame plates, heatsinks, screws and Delta 120mm fan.
Plus this good old S1, so it makes two possible community board miners.
Only thing left is community miner boards +controller like raspberry pi maybe(?).
The ones that I got printed had a little fault, they didn't come with even thicknesses (sides, bottom).
The material used here is PLA.
Design should be good for air flow. I actually got little lower temps now with S1
Some pictures (click for bigger ver.):
3D model:
3D printed parts (3mm thickness version):
Original Antminer S1:
S1 fitted with 3D printed frame parts, fan attached with sheet metal screws:
Download links for .STL file (3D printing):
S1_FRAME_PART_THICKNESS_3mm_by_HagssFIN.stl - https://mega.nz/#!pt0EyYzZ!oVD9ay2Jsr0RUiQ8PImCvIyql4nRMIXMSUXn7F8Fpkk
S1_FRAME_PART_THICKNESS_5mm_by_HagssFIN.stl - https://mega.nz/#!kx81jBqJ!OYJhh-pY053sQEV6wDMu_UmzrE1OrBHOBv_lj8cGFAw
Repeating the question. It looks like some prototype PCBs I ordered should be in next week. I can write enough code to get basic functionality but probably not actual mining, at least not within the schedule I have (what with manufacturing a new batch of PSU boards and a new batch of Compacs on top of regular duties). So, is anyone interested in working on a cgminer driver for a small project of mine and possibly sticking around to work on the base driver for the Open Community Miner core project?
In case you're wondering, I'm not assuming volunteers. I can't offer much right now but you would get paid.
In case you're wondering, I'm not assuming volunteers. I can't offer much right now but you would get paid.
Am interested.
The last serious coding I did was back in '94 (assembly, C, C++).
Have done some casual embedded coding in the interim.
My "compadre in crime" is well versed in the modern languages.
Have emailed him to see if he's interested/has the time.
Haven't looked at the cgminer source.
What languages are used and what language(s) expertise are you looking for?
We might be able to help.
Me = [email protected]
cc = [email protected]
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