Topic: DIY FPGA Mining rig for any algorithm with fast ROI - page 56. (Read 99472 times)

lyra2z will not fit fully pipelined (corrected).

VHDL and logic algebra

lyra2z will not fit fully pipelined (corrected).

The DE0-Nano-SoC is a great board to get into learning this stuff. I have this and a few of the Max10 50kLE boards that I occasionally use for initial RTL hardware evaluation because their just so easy to work with. Vivado and Xilinx’s tools are steeper learning curve, but definitely doable.

With that said, the Cyclone V 5CSEMA4U23C6N on that board is about 1/5th the logic of what I’m proposing and while it has high-speed DMA to the ARM cores, it doesn’t have any high speed IO such as PCIe to other peripherals. That makes it tough to use outside of single small algorithms (I.e. Keccak).  The $199 version of the M.2 has ~100 Logic Elements and the $329 version has more than 200, capable of running at higher speed. The top package also has 1GB DDR3. Peak power consumption is around 15W from on-board M.2


Here’s an update summary for those catching up on this thread:

1. A few of us have been working on algorithms on FPGAs, and they’re profitable. Whitefire990 intents to release his with miner/dev fee and others of us have decided to share with the community in various forms as well.

2. On the high end the VCU1525, based on the VU9P is a very good candidate for this. It is currently a Xilinx development board on promotion for $3995, but only very small batches are being produced and the price is set to go up. Some algorithms require connecting multiple with high speed links to achieve the best performance.

3. Senseless (and possibly self, if I can be helpful) have been organizing essentially a group buy - but with FPGAs it’s less of a group buy and more of a group build. That is expected to ramp up the VCU1525 style (some power/cooling improvements)  availblility in a similar price envelope to Xilinx dev version. Working on production in US and Europe so it can be available everywhere.

4. I’ve also decided to reveal one of the smaller FPGA options in the $200-350 price envelope that I had developed for internal use and deploy, to provide an entry level option. It has a slightly different set of capabilities from the big VCU1525, but for many things it does scale.

For both hardware offerings from the community (and possibly others) orders are expected to start in June.

These boards are not so much for Ethash (though they can be used to assist/accelerate GPUs in it) , or Equihash. They excel , can improve total system performance on, or are at an advantage on Keccak (and most SHA3 candidate) , Phi variants, NIST5, Timetravel10, Lyra/LyraRev2, etc.

Someone else can chime in if I missed anything.

So.  What programming languages and information should I be learning so that I can better understand this stuff?  In school now.

Hi,

Really interesting thread! I am beginning to mine using FGPA boards. I have been GPU and asic mining for the past year or so and have been interested in the FGPA side of things since hearing of it recently. I have purchased a Terasic DE0-Nano-SoC Development and Education Board to begin my learning. Can you say if any of your algo's will be compatible with the board mentioned? 1GB DDR3 ram and ARM dual processor.

Best,

Karl.

Anyone trying to organize a group buy of the VCU1525 kits ?

LOL VCU1525 has only 33 MB of uram - it is nothing. This price overvalued FPGA's can mine only few algos. If the anti-asic and anti-fpga policy will be continued, this FPGA will mine nothing.
Main problem is small amount of high speed RAM and small amount of LUT. This is kicking out a lot of actual algos like equihash, ethash, CN-v7, X17, X16r, Lyra2Z, leaving fpgas with primitive low-profit algos like keccak, tribus, skunkhash, lyra2v2, etc.