Topic: DIY FPGA Mining rig for any algorithm with fast ROI - page 58. (Read 99472 times)

The DE0-Nano-SoC is a great board to get into learning this stuff. I have this and a few of the Max10 50kLE boards that I occasionally use for initial RTL hardware evaluation because their just so easy to work with. Vivado and Xilinx’s tools are steeper learning curve, but definitely doable.

With that said, the Cyclone V 5CSEMA4U23C6N on that board is about 1/5th the logic of what I’m proposing and while it has high-speed DMA to the ARM cores, it doesn’t have any high speed IO such as PCIe to other peripherals. That makes it tough to use outside of single small algorithms (I.e. Keccak).  The $199 version of the M.2 has ~100 Logic Elements and the $329 version has more than 200, capable of running at higher speed. The top package also has 1GB DDR3. Peak power consumption is around 15W from on-board M.2


Here’s an update summary for those catching up on this thread:

1. A few of us have been working on algorithms on FPGAs, and they’re profitable. Whitefire990 intents to release his with miner/dev fee and others of us have decided to share with the community in various forms as well.

2. On the high end the VCU1525, based on the VU9P is a very good candidate for this. It is currently a Xilinx development board on promotion for $3995, but only very small batches are being produced and the price is set to go up. Some algorithms require connecting multiple with high speed links to achieve the best performance.

3. Senseless (and possibly self, if I can be helpful) have been organizing essentially a group buy - but with FPGAs it’s less of a group buy and more of a group build. That is expected to ramp up the VCU1525 style (some power/cooling improvements)  availblility in a similar price envelope to Xilinx dev version. Working on production in US and Europe so it can be available everywhere.

4. I’ve also decided to reveal one of the smaller FPGA options in the $200-350 price envelope that I had developed for internal use and deploy, to provide an entry level option. It has a slightly different set of capabilities from the big VCU1525, but for many things it does scale.

For both hardware offerings from the community (and possibly others) orders are expected to start in June.

These boards are not so much for Ethash (though they can be used to assist/accelerate GPUs in it) , or Equihash. They excel , can improve total system performance on, or are at an advantage on Keccak (and most SHA3 candidate) , Phi variants, NIST5, Timetravel10, Lyra/LyraRev2, etc.

Someone else can chime in if I missed anything.

That's the USD 5K board that won't be shipped outside the US ?

thats a board with a 50k Logical cells FPGA?

Hi,

Really interesting thread! I am beginning to mine using FGPA boards. I have been GPU and asic mining for the past year or so and have been interested in the FGPA side of things since hearing of it recently. I have purchased a Terasic DE0-Nano-SoC Development and Education Board to begin my learning. Can you say if any of your algo's will be compatible with the board mentioned? 1GB DDR3 ram and ARM dual processor.

Best,

Karl.

Listed a couple posts back (USD at least) I’ve got three versions but seems most interest is in the highest speed.

I like the sound of it.  Currently Im running Biostar H110m boards.  Buying another board is no biggy.  I have 1 16x slot and the rest is 1x.  I assume I could just run one in the 16x slot.   I have no M2 that Im aware of.  Keep us informed.  Id like to try one of these just to play at least.

How much would that plug & play FPGA cost ? Excluding shipping and VAT / custom duties.

I designed for Ethash originally, but things are changing there. many more algorithms are possible and I’m beginning to work on that now. Let’s continue to underpromise and overdeliver.

You can run essentially as many as you have slots or PCIe lanes for, but unlike normal GPUs on risers this actually needs the PCIe bandwidth to be beneficial.

You can use it in the multiple M.2 slots on a lot of motherboards that support it, like the popular Prime Z170/270/370  variants). You can also just get a M.2 to PCIe adapter ($10-15 on Amazon).

I’m testing using 4 in 16x bifurcated slots in host cards like the Hyper x16, but not all motherboards support that.

If your GPUs are on 1x risers and you’re not using it standalone you’ll need ~4 GPUs per M.2 for maximum benefit regardless of algorithm - because you’ll be streaming data to/from the FPGA and you want to match its 4 PCIe lanes to your other devices.

if you have one GPU in a normal 8 or 16x slot you may be able to fully utilize the accelerator paired with that GPU.

The board is capable of reconfiguring itself, so for example it can configure itself for the current timetravel10 permutation and while it is not big enough to hold all 10 algorithms at once, it can accelerate the first 2-5 of them before offloading the rest to the GPU to finish. In this use case it can provide as much as 33MH of lift. Most chain-hashing algorithms can see similar benefits.

So you are saying these can be used along side GPU to accelerate. What algo’s can this work along with?  Like Ethash?  X16R?

How many can be used with 1 rig?  Do you run 1 fgpa to 1 gpu?  Or 1 gpu to a rig?

Still swamped with final mass production preparations (I had to take an emergency detour to secure the necessary memory chips in quantity - DDR lead times have been 6 months for a while now. I took steps to mitigate that months ago but still had to pull some strings.)

1. It is plug in play, in that you can either use the (closed source - sorry :/)  bitstreams I’ll provide (at the moment Ethash acceleration, Keccak, and CrpytoNight7 acceleration)  + miner, or because of the selected chip you can use Vivado Webpack for free to build open RTL and use ccminer or others.
- note I use the term acceleration because this is really built to work in hybrid with existing GPUs and system RAM. It can run stand alone as well, but best to get best returns.

2. You won’t be limited to my bitstreams, others can develop for it, and the design was made so it could be used for lots of general purpose acceleration. As far as I am aware there is no lower cost board available with these resources.

3. There will be some warranty, I need to determine what terms. It’s prerty hard to intentionally brick a GPU, but it is pretty easy to (un)intentionally brick an FPGA if you load your own software.

I'm interested in your "M.2 accelerator" especially given your affordable price range. Might be a good way to get feet wet with FPGAs. I sent you a PM regarding this and i understand you won't be posting figures or other details but the community may also benefit from the following general questions:

1. Is this plug-and-play hardware that already includes software which can easily be configured?
2. What about software updates, can we be assured that you will provide maintain these and not leave us with paperweights?
3. Does it come with warranty?

~ LOL ~ high performance python programs.

good one !

Yep, nothing (currently) intense is happening on those 7000s. Most just simple system mana game to.

But... expect massively bigger FPGAs in Bitmain tech soon...

Using c/c++ to program an FPGA high performance app is a bit like writing a high performance app in Visual Basic “. Or maybe Python. But it can help learn.

There is an ARM CPU chip.   The Zynq 7000 is an SoC with ARM+FPGA.  i am not sure what the FPGA plays the role there but the ARM should be the host processor.

No. The FPGA is used to generate nonces and a few other management-related tasks. There is still a regular ARM CPU on Bitmain & Innosilicon gear which runs the Linux userland, the web interface, cgminer etc.

I see, Thanks.

So as a comparison, FPGA/SoC in Antminers is like a CPU in a traditional PC and the hash-boards are like GPUs (although with fixed logic)?

that would be nice to see. as an alternate source code

They use an FPGA (SoC) on the controller to handle certain tasks like high-speed communication. Antminers do too.

https://forums.xilinx.com/t5/Xcell-Daily-Blog/Heigh-ho-Heigh-ho-Bitmain-teams-189-bitcoin-mining-ASICs-with-a/ba-p/804793
https://www.xilinx.com/products/silicon-devices/soc/zynq-7000.html

x3

In the meantime I'll prob end up see what kindof performance I can get porting some algos using C/C++ to aws f1 instances (same chip as VCU1525 board, V9P)

It looks like there is a free training/tutorial on developing C/C++ using aws f1: https://www.xilinx.com/about/events/virtual-developer-lab.html

It contains a FPGA chip.