350W is a rounded up number for the whole system, including the power lost in the 2 stages of power supply, and fans etc. The chip itself draws 250W @ nominal.
Depends on how hard you cool and overclock your Sandy Bridge E. The company that is assembling our systems specializes in overclocking. They run Sandy Bridge Es overclocked to 350W (CPU power alone, not whole system), using the same cooling system we are using. We are also using a heatspreader.
Metal migration is a well understood phenomenon. We have followed all the fab's rulesets for electromigration so that the current levels we're going to see will not be a problem (even current distribution, and thicker metal layers). Currently in the simulator for EM our chip passes the test for a 5 year lifetime, but fails the 11 year test - and that is running somewhat overclocked, at about 540GH/s.
Thanks for the info. What's the size of the package/heatspreader and what are you using between it and the chip? Solder? TIM? W/mK?
Not sure why this is still a question (goes beyoond just HF). Remember excluding water cooling there chips doesn't run on 12V. A good 12VDC to ~1VDC PSU (on the board) is at best 90% efficient.
So if the chip uses 250W @ ~1VDC then it will require at least ~277W @ 12VDC. Now the ATX PSU which converts the 120V AC isn't 100% efficient either. If it 90% efficient then to supply 277W @ 12VDC requires 308W @ 120VAC.
Add in 20W for pump and radiator fans plus a margin fro safety and ~350W is more than reasonable.
Once again this isn't unique to just HF, it applies to all ASICs by all companies.
Board Wattage = Chip Wattage / DC PSU efficiency
System Wattage = ASIC Board Wattage + Controller Wattage + Fan Wattage + Auxiliary Wattage
Wall Wattage = System Wattage / ATX PSU efficiency
The wattage at wall is NEVER going to be the wattage at the chip level.
Yes, you are quite correct, two power stages at η around 0.9 are enough to have 19% in power losses, plus the rest of the cooling extras.
Still, the specs say "
Under 350 watt power draw*" and "*
Real silicon power consumption may vary from simulation results by +/- 20%", so we're talking apples and oranges here.