Topic: HashFast announces specs for new ASIC: 400GH/s - page 548. (Read 880461 times)

I was not aware that commercial PSU had reached a 90%+ efficiency on a ~100% load.
Seems to be acheived, and not that expensive, so I'll just shut up.

The energy density (W/mm2) would still be the same.  1/4th the wattage over 1/4th the area.  They had decided to go water cooling for efficient heat transfer.  That would mean more complex asembly, more components, and higher cost.  Not sure how that is going to improve ROI%.

There is a reason that Intel puts 4 cores on a single socket chip rather than having consumer grade boards run 4 sockets with single core processors.


BFL get it right?  The PCIE card form factor is very tough.  BFL will need to cool 350W using a single blower fan in a very compact space.  This is a task that even AMD got wrong ... twice (6990 & 7990) resulting in 6 month delays on those cards.    If you said Avalon, AsicMiner, or BitFury (easily cooled boards with multiple chips over large surface area) you might have had a point.  I don't think "right" is the proper word (it is a design choice) but you may have had a point.  BFL?  You showed your true colors there.

Hey simon how about just putting some guidelines like "this chip wont overclock past 540" and a mechanism to monitor or log chip speed and shut it down if it get past a certain threshold, maybe something besides a thermal sensor..

then you dont have to offer a 10 second warranty and you can claim you have hardware that you support and stand behind.
 

Thanks for the info. What's the size of the package/heatspreader and what are you using between it and the chip? Solder? TIM? W/mK?


Yes, you are quite correct, two power stages at η around 0.9 are enough to have 19% in power losses, plus the rest of the cooling extras.

Still, the specs say "Under 350 watt power draw*" and "* Real silicon power consumption may vary from simulation results by +/- 20%", so we're talking apples and oranges here.

Simon, regardless of what you think is doable, you are taking unnecessarily high risks to develop such a high-TDP chip. It would have made a helluva lot more sense to go with, say, 4 chips of 63W each. The die would be 1/4th the size. 1/4th the cost too since you would have 4x more chips per wafer. A little more PCB space would be used (not a big deal). But this would have taken away a lot of the risk of cooling a single hot chip.

Bitcoin mining being an embarrassingly parallel algorithm, there is absolutely no point in trying to made a die as large / as hot as possible, when you can spread computations across chips with virtually no downside.

I see this as a very poor strategic decision made by Hashfast. (And Cointerra, and KnCMiner). Only BFL seems that they will get it right, since their 350W Monarch card should split the workload across 10-30 chips.

If I was an investor in Hashfast, I would have asked you "why do you take the risk of aiming at the highest TDP possible for your gen1 chip?". Please explain your choice.

?

Talking about serious PSU, here. The kind that cost more than HF chips.

Another quick question.

Regarding the on chip thermal control listed in the blog: https://hashfast.com/thermal-control/
Is this thermal control done inside the chip automatically, or does it require the driver/cgminer to throttle down the chip?

edit:  I see my question was already answered by you right above my post. TL;DR - Sensor and driver work in tandem to seek peak performance of the chip.

There is a temperature sensor on the chip, and as long as the open source software has not been incorrectly modified, it will limit the temperature. In fact the software will automatically hash at the fastest possible speed, limited only by temperature. If you deliver better cooling, or colder air, it will go faster.

Not sure why this is still a question (goes beyoond just HF).  Remember even excluding water cooling pumps, fans, and controller boards there are a lot of efficiency loss between between the wall and the chip.  The chips doesn't run on 12V they run at ~1VDC (exact voltage will depend on ASIC design) and no ATX PSU supplies 1VDC so ANY ASIC will need to convert the 12VDC to ~1VDC used by the chip and that usually means at least a 10% loss right there.  Of course most people don't have 12VDC outlets so you need to convert the wattage at the wall to the 12VDC uses by the ASIC board and that is another 10% loss (depends on PSU rating and load).

So a hypothetical chip (any chip) which uses 250W @ ~1VDC will require at least ~277W @ 12VDC not 250W. ~27W is lost as heat not at the chip die but at the DC to DC PSU.  Now for the ATX PSU to supply 277W @ 12VDC will require 308W @ 120VAC and another 31W will be lost at the ATX PSU.  Add in 20W for pump and radiator fans plus a 10 to 20W safety margin and ~350W system wattage with 250W chip wattage makes perfect sense.  Once again this isn't unique to just HF, it applies to all electronic devices.

Case in point.
Avalon chip wattage: 1.86W @ 1.15 (282 MH/s nominal)
Avalon total chip wattage 1.86W x 212 chips = 394W
Avalon wattage at the wall: 620W
Total system wattage is >57% more than chip wattage.

https://en.bitcoin.it/wiki/Avalon#Power
http://garzikrants.blogspot.com/2013/02/avalon-miner-power-usage.html

Because with open source software, and overclocking we don't know what people will try and push these things to do.

Thanks for the details Simon.

If the chip is rated for 5years at 500GH, why is the warranty only 10 to 30 days?

350W is a rounded up number for the whole system, including the power lost in the 2 stages of power supply, and fans etc. The chip itself draws 250W @ nominal.

Depends on how hard you cool and overclock your Sandy Bridge E. The company that is assembling our systems specializes in overclocking. They run Sandy Bridge Es overclocked to 350W (CPU power alone, not whole system), using the same cooling system we are using. We are also using a heatspreader.

Metal migration is a well understood phenomenon. We have followed all the fab's rulesets for electromigration so that the current levels we're going to see will not be a problem (even current distribution, and thicker metal layers). Currently in the simulator for EM our chip passes the test for a 5 year lifetime, but fails the 11 year test - and that is running somewhat overclocked, at about 540GH/s.

OK, so two questions:

1) https://hashfast.com/shop/babyjet/ states 350W power draw (+/- 20%), but the chip only consumes 250W?  100W for cooling/misc?

2) An overclocked Sandy Bridge-E doesn't "run" at 350W, for example check this (pic below). The 349W here is System Peak Power, a very different metric (system vs CPU and peak vs sustained).

Subtracting the system idle power ([email protected]), even at peak usage it would run at 264W (and it would die from electromigration if run like this 24/7), so 264/425 = 0.621W/mm^2, still 20% below 0.77W/mm^2.



Edit: Let's not forget that a Sandy Bridge-E uses a high quality heatspreader (IHS) with fluxless solder, so the actual contact area with the cooler is much bigger than the die size, reducing the W/mm^2 requirements by a large amount.

Hashfast's chip at nominal (400GH/s) is expected to consume about 250W of power, not 350W. i.e. 0.77W/mm^2. Overclocked Sandy Bridge E in shipping commercial products with the same cooling system runs 350W with a 425mm^2 die, 0.82W/mm^2.

We've posted a new update on our blog:
https://hashfast.com/countdown-to-tapeout/

-John

I need a group buy.  I'd like to bring in another $1,500.

nah i dont wanna blindly send them money i cant get back.

do a bank wire.