Topic: [In Dev] 28nm mining FPGA (Amateur) - page 3. (Read 7951 times)

well, in theory, I can get xilinx chips at about half price (free if only a few)
So I could make this fairly cheap, probably still not cheap enough to beat ASIC however.
Also, on a related note, what sort of software is out there to design a case?

What I think will be great is if chip makers were to make FPGA's super cheap. Perhaps, there are some technologies on the horizon that will enable them to do that. I'd love to see a paradigm shift back to FPGA. Paradigm shifts are entertaining to watch unfold.

I can most likely have 1000 pcs of artix on my doorstep tomorrow morning. The same is not true for Avalon— AFAIK they've not given much in the way of dates, but it looks like their pipeline is a couple months long (though hopefully shortening).  Re-usability is a benefit. It's not the only one.

Well I don't have any sort of specialized production equipment, so IF I end up selling anything, depending on volume shipping might take awhile anyway :p

That would be a five times improvement. Sounds much better so far. To be on par with the Avalon, it's going to need another four times improvement.

One of my assumptions is that the supporting PCB & electronics components will be roughly similar. So, the comparison I'm doing is the cost for the chips alone. Avalon is selling chips in bulk at much cheaper prices.

It seems the only benefit of FPGA, for now, is that it can be re-used for other applications, and thus have resale value (whereas ASIC's will be trash if faced with some kind of catastrophic failure of bitcoin). Also, FPGA's delivery time might be better - shouldn't be too difficult to beat any of the ASIC developers at this time.

Also, FPGAs have the ability to be re-purposed and resold for a different task, ASICs however, do not have that.
However ||bit is correct, this is mainly an academic pursuit for me, if people end up wanting to buy it great, if not, that's fine aswell and I'll just make and keep some for myself xD

I would expect them to be substantially _less_ costly per MH.  E.g. fitting potentially 400-900MH/s in an $100 part. Beyond the basic process improvements the Artix/Kintex parts have a substantially improved architecture.  Of course, the S6LX150 designs have had a lot of effort applied to optimizing them.

A batch 3 Avalon cost 75 BTC and delivers 68GH/s. At the current market price that is  $75/GHs.   So maybe a 28nm FPGA ends up being twice the price per MH initially.   But: It would have a smaller basic unit size (probably a 2 or 4 chip board) which would create a larger customer base and it could potentially have better supply.  What does it matter that _in theory_ an Avalon is $75/GHs now when you can't actually buy one??

Plus, once there is a ASIC miner on a better process in widespread use the avalons will either need to head to the landfill— or at least Alaska for use as heating units, while a 28nm FPGA may have better reusablity.

I imagine that if someone had a board like the x6500 based on artix _right now_ they would be selling out. In a month? who knows.

So I don't think this is interesting just as a novelty project... though if it's just an "okay idea that won't make much money" vs an amazing one depends a lot on how the asic miner supply plays out, how the bitcoin market price plays out, etc.

I'll disregard power efficiency, since that may not matter to some.  However, aren't these models of FPGA's just too expensive to compete with ASIC chips?

The Spartan's typically used were $150 each. Even if bought for $100, that's only maybe ~270MH/$100. I'm not knowledgeable on all the pricing (bulk or otherwise), but wouldn't an Artix be proportionately as costly - if not more?

If I'm not mistaken, an Avalon is about ~280MH/BTC.08 (today's rate that equates to ~280MH/$5.50). So, unless you can purchase an FPGA with a performance/cost that beats that, then I don't know how this can work. Perhaps, this is just an academic pursuit for you.

I had iidx explain to me what was required, but I've been doing some reading and as soon as I get it to mine properly I'll post exactly how

Pretty cool -- I'd love to see a walkthrough/narrative of what you've done (that is to say, once you've arrived where you want to) to get fpgaminer up and running on the ML605.

I'd be keen on picking up one of those boards to muck around with, but would be a little more confident with a primer.

Good luck with the project, it was time for someone to put to work in this theme, you know you can do once you have a good performance in a Virtex7 for example? Use it as a prototype for manufacturing an ASIC with your bitstream and you will have a new generation of ASICs.
But it's still a bit early for that, I do no want to make you feel pressured.

Forgot to mention that the ML605s and the boards with the LX130s are both speed grade -1 (DSP48 max frequency 450MHz).

I do have access to boards with K7325T and K7480Ts, but neither has PCIe (they aren't xilinx dev boards) access to a normal PC so I never bothered trying on those boards.

The Kintex and Virtex FPGAs are basically the same.  The Virtex just comes in bigger sizes and allows for higher speed serial transceivers (up to 28 Gb/s).

As a reference, I've been using ML605s at 375 MH/s since 2011.  That's just using 3 copies of the verilog port, with some of the adders replaced by DSPs (Not pipelined).  It's also using some space because I use PCIe for the connectivity to the PC.  So, you could use 375 MH/s as the benchmark for your ML605.

It's possible that there is more speed in there using more pipeline stages, but the size of the device limits what can be done.  I haven't tried to get more out of it so far. 

I've been trying to get 300+ MH/s out of V6LX130Ts, but only have it running at 200 Mhz right now (using PCIe as the connectivity method again).  I've been trying to fully pipeline the DSPs (as FPGAminer has done with the KC707), but the problem is there aren't enough registers/dmem to delay the rest of the pipeline in that device (plus it does not have enough DSP48s to replace all the adders).

I'm suprised that the kintex and vortex are equal, I would expect the virtex to be quiet a bit faster xD
but thanks, for this, this means the FPGA should put out about 1GH/s

I just did a scan over the 7 series datasheets to see their relative performance.  Here is a summary of the important figures; I figure they might be helpful for this and any other 7-series based projects:

Everything is for the -2 speed grade

The FIFO Fmax (block ram) has been a fairly good measure of the absolute maximum frequency we can expect to see out of hashing cores.  My rough estimates show that Artix 7 is likely to have a better MH/s/$ based on these figures alone, and single unit prices.  However, it is difficult to tell for sure, because I suspect that the Artix is crippled in some other way.  I have not check each chip's routing and CLB configurations.

Working on compiling source now.
Will update with Virtex-6 Hash rate (this will be about 30%-40% higher than artix-7 hash rate) so you will have some sort of estimate on how fast it will be.

Seems there are no spare Atrix-7 boards laying around anymore, so I will have to wait until I can get one. This should not cause much of a delay at all as I can still work on the hardware part of it. I should have a working PCB design/layout by next week sometime. I do have a full license for Xilinx Software, so I can still make power estimates and things like that. I also have an ML605 and whatever runs on that SHOULD work on the Atrix-7 with a bit of modification.

That's what I'm going for.
thanks for the interest

Hey man, very interested in this!  Post more info when you have it!  I hope you guys can make them very price-competitive. 

Will do
I can't really provide much info yet as I haven't got the actual PCB layout yet, but I will run a miner on the AC701 (Artix-7 Eval kit) and report back how many MH/s it gets (Should be about 300-400 per chip)