Topic: Klondike - 16 chip ASIC Open Source Board - Preliminary - page 92. (Read 435369 times)

Not to be too harsh like Loshia was on me.... (sarcasm)

But do we now need a water block thread? Consider we pushed out the case discussions, heat sink discussion why is this discussion still going strong here? Just asking not accusing.

So the water is running through the inside of the "box"? The largest problem with any setup like this is making sure that there is conduction between the chips and aluminum to the water. There will be no convective cooling in this setup (such as blowing air over the chip without any heat-sink). I also wouldn't consider setting something like this up along with a radiator and fan as "easy" unless you already have this stuff around. But I would have to see a design to make sure I understand what you are talking about.

Edit: OK, I've seen a design similar to what you are talking about. So, these current designs are placing heatsinks/aluminum housing on the underside of the board... how is heat being conducted from the thermal pad on the chip, through the board, and to the heatsink/aluminum? If it is just silicon then there may be a conduction/heat-transfer issue. It seems that this QFN design isn't really made for external heat dissipation.

I don't think there is any misunderstanding.

You have rightly DEFENDED BKKCoins against my "aggressive" asking of question.

I don't need to know specifics as most of his posts regarding watts were off the cuff and calculated using what info he had that is why I quoted.

I think you are simply getting a little too defensive considering all I am asking is what would be the cut off line on this decision to go with a change in BOM or not. He put the 3 possibilities up for discussion. I am responding with when do you think you would be able to make that decision? 1 week 2 weeks?

Seriously I have been supporting BKKCoins where ever I can so I think asking a question like this is fair for everyone concerned. Might want to just relax a bit no one is demanding he answer... this isn't an Avalon thread or BFL thread... we all know he is working extremely hard and we all appreciate the effort. The thread is here to ask questions and get information. Sorry if you don't like the question being asked right now.

Not so hard to answer right?

Now we will see if he has time or not on timeline. Again it has to be asked. If he has no time that is fine. Not trying to slow the process trying to calm the waters for many out there who have already invested a lot of time and money into this. I ask for everyone for me I have confidence in whatever the solution he comes up with is I have faith and will be using his board no matter which direction it takes.

The potential for me is 375 extreme 400 MAX. I want to max it out but i am not ready to pay the price and see magic smoke out there. Let us be realistic about overclocking and cost of the board at 450 it may turn out the we need about 3A per chip = Heat, componets + cooling - too much for a starter project

I am sure that BKK will comment all of it but let us leave him work.

There will be other chips, probably second version of K1 (K16) and so on. In the end it is all open source - You are free to redesign ( change components) and do whatever you want with it. The reasonable overclocking goal at this stage is 350 in my oppinion. That is buy the design from avalon to be aircoled with heatsinks

I was asking for future REFERENCE.

It is a fair question to ask at this point as many are in the fish or cut bait boat right now so a little heads up on the timing of the decision be nice? 1 week 2 weeks?

As he has planned to do the overclock TESTS... see the git hub read me I don't think this is too much of burden.

Given we have a potential of 450 Mh/s top end on the chips this is not something we can let twist in the wind for too long it is a critical decision so time frame on it be nice.

With overclocking potentials and the small change in the BOM that can allow for it on the K16 what would the watts for K16 and K64 be with this minor change?

K16 = 38.4W ?
K64 = 153.6W?

When do you think you will decide on this change / no change?


https://bitcointalksearch.org/topic/m.2572272

A K16 will use around 32W, so a K64 will need about 128W each (with 4 leads). They're designed to take a PCIe 6 pin connector much like a GPU. I would guess that you could run a K64 off each PCIe lead from the PSU with splitters to feed each of the 4 sections. I haven't gone to check the specs but they would  handle something like that. I wouldn't have a problem running 4x K64 off my 600W supply. I used to run 3 GPUs at 500W without any issues. I'd say you're better off going that route than using crappy low wattage power adapters for each board, or section of board.  Like with GPUs  stick with solid reliable PSU units like Corsair, preferably high efficiency Gold (90%) rated.

was wondering how long it'd take people to notice ( and more importantly share the constant that we've released on github.)
the number you are all aiming for is 450 of course, that's not really possible on just air cooling.
`Yifu G. | Avalon ASIC Reference Design Release

I'll go ahead and wire up all 6 pins to be on the safe side. On my PSU 3 pins are +12V and 3 are ground. Just to make sure, are the 3 pins closest to the edge of the board the +12V pins with the inside pins being ground?

Thank you!

I'm not sure why the PCIe spec says only use 2 pins each for power. Both the Corsair PSU and AMD Radeon adapter cables I have both use all 3 on both sides. So I guess there must be some optional use or something.

I would recommend using 2 wires at least even if jumped between pins on the wires. I'm more concerned with all the current flowing through 1 pin on the PCB joint to copper. It's likely within ratings but will cause more heat than spreading it over 2 or 3 pins.

Yes, can see on scope and count the pulses, convert to 1s and 0s. I didn't remember to subtract 0xC0 as mentioned above but it wouldn't matter as the number is completely different. But it is consistent and repeatable.

I didn't note the rise times but next time I'll measure that. It's roughly the same as input data as I didn't notice any "slope", pretty much straight up/down signals (which of course depends on the horz time base).

Yes, can see on scope and count the pulses, convert to 1s and 0s. I didn't remember to subtract 0xC0 as mentioned above but it wouldn't matter as the number is completely different. But it is consistent and repeatable.

I didn't note the rise times but next time I'll measure that. It's roughly the same as input data as I didn't notice any "slope", pretty much straight up/down signals (which of course depends on the horz time base).

Good job! Thanks for the update!
How do you know its not giving the correct result? Can you see the result on your scope?
What is the rise time on report_P & report_N  with the 1K pull ups?
Thanks again for the updates.

NEWS FLASH!!! NEWS FLASH!!!

My K16 is hashing with 1 chip.

It's not giving a correct result nonce yet but I'm almost 99% sure that's due to errors in precalc code or maybe I'm shifting in word order backwards.

I soldered an ASIC on the board this morning and spent all day twiddling this and that, mostly getting the clock config right. Then bamm I saw something that looked like nonce bits coming out but they were stunted little bits trying desperately to reach high. But the twinkle was enough and I went through the Avalon reference design again to check and realized I'd not used the correct pull-up value for the result lines. Somehow I f'd up and spec'd 100k resistors instead of 470R. So I quickly removed them and soldered in some 1K that I had here. And the bits sprung forth to their full heights. I was totally excited and hopping around my work bench. Even my wife was in to see what the big commotion was about.

So... next step, test the UART receiver, and muck with the send data until the right nonce comes back.

BTW I'm running at half clock b/c no heat sink attached yet. The chip gets slightly warmish to the finger. With only one chip and half clock you have to set the scope trigger and hold the probes for a while until a nonce is found. I counted about 4-8 seconds but of course it depends on what point it is in it's cycle. One chip at half clock (128MHz) would be about 33 seconds for a full sweep.