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Topic: Latest update on BFL shipping 21/02/13 More Updates 25Th - page 3. (Read 4304 times)

full member
Activity: 180
Merit: 100
I'm just hugely confused here.  I'm not a BFL Customer, and I haven't really been keeping up with the BFL story, but I happened to see this thread and this update has me puzzled.

I should firstly state that I have more than a bit of experience with electronics and semiconductors.  I have been in the industry for a long time, and I deal with all sort of IC packages.

That said, bumping is almost always a term used to define the process of 'Bumping' a wafer so that it can be used as a flip-chip.  flip-chips are bare, non packaged dies that are then attached directly to a circuit board (PCB).

I was under the impression that BFL was using QFN packages for their ASIC chips.  If this were the case, no bumping would be necessary.  The bare wafer would be cut into individual dies, the dies would be wire-bonded to a QFN carrier and the QFN would be reflow soldered to the circuit board.

Is that no longer the case?  Did BFL switch from using QFN's to using direct flip-chip assembly?  I thought they were planning on being able to build these circuit boards in house?  It's been a long time since I looked at MyData equipment (wayyyy too slow to even be on my radar), but the last time I did, there was NO WAY Mydata was going to be placing flip-chips.  I also didn't see any equipment in the BFL equipment thread that would be able to underfill a flip-chip.

I'm just confused.  Are they using flip-chips (or some similar direct die attach assembly process), or are they using QFN's?  I only bring it up because if they are using QFN's, then bumping is not happening.

Enigma
legendary
Activity: 1820
Merit: 1001
21 Feb 2013

The chips are still at the bumping facility. They are taking their time, much to our chagrin, to be sure we don't wreck one of the wafers with a failed bump. We are trying to determine if we need to physically go to the bumping facility and sit in someones office until it's done. We should hopefully have more information on that later tonight or tomorrow. If it turns out it would be efficacious, that's what we will do. However, perhaps my reputation will precede me and they will elect to get the job done and send the chips to the packaging facility instead of having me sitting in their office all day.

The good news is, we should be able to accelerate the second set of wafers as well as the bulk of the rest of the wafer run, allowing us to ship product en mass even sooner than we expected. This is still being negotiated, but things are looking good as far as that goes.

After reading the update from BFL I had to find out what josh was referring to when saying chargrin. It looks to be something like this below.

cha·grin  (sh-grn)
n.
A keen feeling of mental unease, as of annoyance or embarrassment, caused by failure, disappointment, or a disconcerting event: To her chagrin, the party ended just as she arrived.

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to be sure we don't wreck one of the wafers with a failed bump.

Now even making claims like this does this give an indication that their already is a failed bump? and are in a way indicating that their is a failed bump causing all the delays.

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We are trying to determine if we need to physically go to the bumping facility and sit in someones office until it's done.

Well after reading elsewhere BFL do not have any contact with the bumping facility and this in my option is a bad move. Having such big orders and currently delays one would think it would be wise even if going to the facility to check up and make sure everything is been done. This should be a standard proceedure to actually go to their bumping facility rather than spending time flaying around and booking flights on your airobflplain and having fun. CUSTOMERS FIRST BEFORE FUN AND ADVENTURES EVEN IF YOU ARE A PILOT.

How many more delays are they going to be. Next I can bet 100 satoshi on it that their will be a failed bump if no one goes to the bumping facility as seems their doing something wrong and will cause a big delay.

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The good news is, we should be able to accelerate the second set of wafers as well as the bulk of the rest of the wafer run, allowing us to ship product en mass even sooner than we expected. This is still being negotiated, but things are looking good as far as that goes.

How the hell is their any good news to speed up things if things are already going wrong. Yes indeed speeding up bumping will speed things up however with all the above do you really think it is wise to even do this?

Am a little shocked at their latest update and I feel very concerned for all the people who have already ordered with them. I just hope that things progress and no more delays happen as am sure BFL are losing customers to Avalon including me and am sure 600 other people decided on Avalon rather than BFL due to their delays. If they pick up and fix their problems then I might just might order from them. However I would have to wait until theirs an actually product that some pre orders have got theirs in the post.

This is just me posting some updates and speaking my mind on current situation on BLF. I do hope for the people who have ordered with BFL get their orders and theirs not much more waiting for you Smiley


Edited reason update as of 25th

25 Feb 2013 Update

I know people have been waiting on an update for awhile. The simple fact of the matter is there hasn't been any solid updates to offer. I know people are desperate and starving for information and I wish I could provide new information every day, but some days there just isn't new information. Luckily there is some new information today. It's not the best information (such as we are shipping today!) but it is at least an update.

We had expected the bumping to be done by now, as per the previous update(s). That has not been completed yet. There are a number of reasons why this is the case, and we are not pleased with any of them. The bumping facility, which we have no direct contact with, did not complete the NRE on the timeline we had spoke to the packaging facility about. As I've written in previous posts, we are dealing with such an accelerated time scale that all of these facilities simply aren't used to dealing with. It's been a learning experience for both us and for the facilities we are using. The upside, such as it is, is that going forward, we will have all the large, time sucking hurdles already out of the way and the rest of the chips should breeze through without issue, as all the NRE, tooling, design, planning and machines will already be configured for what we need.

Since Friday we have been, in a word, agonizing over how to make up for lost time. Obviously, we can't make up for all the lost time, but what we have decided is to effectively burn (this is not a technical term, I simply mean we are using one of the wafers for testing instead of creating chips out of it) one of the initial six wafers for testing. This is definitely not something we wanted to do, as it will reduce our initial chip count from a potential 6000 to 5000 chips for the first set of wafers. We are doing this because it will buy us 7 - 12 days for the second set of wafers (and the remaining set of wafers down the road). The time frame between the 1st set of wafers and the 2nd set of wafers should be reduced to a matter of a few days.

Why are we burning the wafer, what advantage does that give us and how can that accelerate the timeline? As many of you already know, we have had the 2nd set of wafers holding with the last layers being unfinished until we confirm we have everything the way we want it on the first set of wafers. We've already started the process to continue laying down layers up until about the last 5 layers or so - by burning one of our precious wafers, we can send it to the ASIC engineers who can essentially wire bond it manually and test the chips, but the wafer will become useless for creating usable chips. By doing this, they will verify that everything is how it needs to be and we can give the foundry the go-ahead to finish the second set as well as the bulk of the chips immediately. The second set of wafers should be done and on their way to us by the time we get chips in house in KC, and the bulk wafers should be done shortly after that.

The test wafer is already on it's way to the ASIC labs and should arrive tomorrow. Presumably it will take a better part of the day to get everything situated and for the testing to begin, so I don't expect to hear anything until late Tuesday or sometime on Wednesday assuming everything goes well. In the meantime, the bumping facility will be bumping the remaining 5 wafers, which should be shipping out on Friday to the packaging house, whom we are paying extra to stay on for the weekend and start the packaging process. We expect at least some of the chips to be on their way to Chicago by Tuesday, where they will be mounted and sent out to our engineers and KC for testing and final MCU programming. At that point, once the MCU programming is confirmed we'll begin assembling the units. Right now, I'm planning on a week from Friday to be the day, but I'm just gonna say that's subject to change at the moment, although I don't anticipate a change right now.

The ASIC team has promised me pictures of the wafer tomorrow, Tuesday the 26th. As soon as I get those, I will be posting them. As soon as I hear something with regards to the chip testing, I will be posting that as well. If I'm not posting an update, it's because there's nothing new to report.
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