I have an NDA with the company, so I can't say which board will be used. Sorry.
I was asking the company if I can remotelly connect on the machine for 2 days and test, the answer was NO way.
So I'm trying to do my best to collect the money...
I would like to start this project, because Is not only for BTC mining.
Topic: Re: Stratix-5 A7 or D5 project 01.05.2013 update - page 2. (Read 6610 times)
What board are you looking to purchase?
This will be write when the machines will be ready to ship.I'm sorry, I don't understand what you are saying.
I thought you were asking for donations of 80BTC to purchase (2) development boards for your own use during development. Is that true? If so, what development board do you want to purchase?
If you already understood my question, then I don't understand your response: can you rephrase it?
What board are you looking to purchase?
This will be write when the machines will be ready to ship.
What board are you looking to purchase?
I have a request -> I have to collect 80 BTC for get 2 development boards
So anybody who will help me, if he will order a machine, he will get a discount price. Hope is fair enough.
I have to test, but I think also LTC mining will be possible
because of some memory (he he)
So if any of you could help me, that I go on with tests, I would be more than happy.
So anybody who will help me, if he will order a machine, he will get a discount price. Hope is fair enough.
I have to test, but I think also LTC mining will be possible
because of some memory (he he)So if any of you could help me, that I go on with tests, I would be more than happy.
Power estimator nicely opens in google docs, but I have no idea how to simulate. There's no cell to input frequency or number of LEs.
No, it doesn't work with Google Sheets. It depends heavily on Excel Macros.
Oh yes I apologize, I was just mentioning that if he invests capital into an FPGA miner for bitcoins, that he always has the option to fall back on FGPA's because they are re-programmable. Wasn't trying to stray too far off topic.
No problem. But you would probably get better response regarding your interest in litecoins in a thread entitled "FPGA's and litecoins" or similar.
so my idea is only for Bitcoin... 
Power estimator nicely opens in google docs, but I have no idea how to simulate. There's no cell to input frequency or number of LEs.
Oh yes I apologize, I was just mentioning that if he invests capital into an FPGA miner for bitcoins, that he always has the option to fall back on FGPA's because they are re-programmable. Wasn't trying to stray too far off topic.
No problem. But you would probably get better response regarding your interest in litecoins in a thread entitled "FPGA's and litecoins" or similar.
Actually my request to start a new thread was directed to Signus regarding a new thread about litecoin FPGA mining and keeping this thread more on topic.
Oh yes I apologize, I was just mentioning that if he invests capital into an FPGA miner for bitcoins, that he always has the option to fall back on FGPA's because they are re-programmable. Wasn't trying to stray too far off topic.
Actually my request to start a new thread was directed to Signus regarding a new thread about litecoin FPGA mining and keeping this thread more on topic.
But he has to put on alternative coin part of the forum I have changed because I will not use Virtex
so is why. Yesterday I find a good post on another forum and I can't find it again, yeah It was on my laptop.... Lol
So in next weeks I will probably buy some chips and test.
The power usage is about 60W per chip, maybe little less.
Yes I do. I'll query there about many things. (See above statement).
Did you ever get a decent quote on those chips? If you really do get a decent price I'd like to buy a few up to play with. Simulations can only do you so much.
Where are you coming up with a power estimate? If it's of any use to you, Altera has a Power Estimator spreasheet you can use. I think you'll need Microsoft Office. It locks up consistently with LibreOffice or OpenOffice. http://www.altera.com/support/devices/estimator/pow-powerplay.jsp
Actually my request to start a new thread was directed to Signus regarding a new thread about litecoin FPGA mining and keeping this thread more on topic.
But he has to put on alternative coin part of the forum I have changed because I will not use Virtex
so is why. Yesterday I find a good post on another forum and I can't find it again, yeah It was on my laptop.... Lol
So in next weeks I will probably buy some chips and test.
The power usage is about 60W per chip, maybe little less.
Actually my request to start a new thread was directed to Signus regarding a new thread about litecoin FPGA mining and keeping this thread more on topic.
You would probably get better response if you started a new thread about this subject.
FPGA's have internal memory. The size is limited, but the memory access has very low latency. Further it's no problem to add external DDR3 or other types of external memory to the FPGA. Most modern FPGA's will typically contain one or more hard memory controllers.
I don't know anything about the memory access pattern of a litecoin application, but I got the impression that it's basically a large cache. You could treat all the internal memory as a cache with low latency access for the external DDR3 memory. The good thing about the FPGA is that you could potentially tune the cache replacement algorithm towards the application, which is something that would be difficult on a CPU. However, I don't know much about scrypt so I can't be more specific.
I will start a new thread when I will heve more information of all the things; Materials, videos, will be posted....FPGA's have internal memory. The size is limited, but the memory access has very low latency. Further it's no problem to add external DDR3 or other types of external memory to the FPGA. Most modern FPGA's will typically contain one or more hard memory controllers.
I don't know anything about the memory access pattern of a litecoin application, but I got the impression that it's basically a large cache. You could treat all the internal memory as a cache with low latency access for the external DDR3 memory. The good thing about the FPGA is that you could potentially tune the cache replacement algorithm towards the application, which is something that would be difficult on a CPU. However, I don't know much about scrypt so I can't be more specific.
I don't want figure out as someone who is only talking bullshit.
I have ideas and If I see that I can move to the next level, I will, If no. I will say, thanks for help. The project is dead
You would probably get better response if you started a new thread about this subject.
FPGA's have internal memory. The size is limited, but the memory access has very low latency. Further it's no problem to add external DDR3 or other types of external memory to the FPGA. Most modern FPGA's will typically contain one or more hard memory controllers.
I don't know anything about the memory access pattern of a litecoin application, but I got the impression that it's basically a large cache. You could treat all the internal memory as a cache with low latency access for the external DDR3 memory. The good thing about the FPGA is that you could potentially tune the cache replacement algorithm towards the application, which is something that would be difficult on a CPU. However, I don't know much about scrypt so I can't be more specific.
FPGA's have internal memory. The size is limited, but the memory access has very low latency. Further it's no problem to add external DDR3 or other types of external memory to the FPGA. Most modern FPGA's will typically contain one or more hard memory controllers.
I don't know anything about the memory access pattern of a litecoin application, but I got the impression that it's basically a large cache. You could treat all the internal memory as a cache with low latency access for the external DDR3 memory. The good thing about the FPGA is that you could potentially tune the cache replacement algorithm towards the application, which is something that would be difficult on a CPU. However, I don't know much about scrypt so I can't be more specific.
I love that modern FPGA's have the capability for memory extensions. Implement a memory controller and then you can essentially fine tune the process later, given you'll need to write a test bench to ensure that you can actually read/write all blocks of memory correctly. Then you can sort out how to implement scrypt into the equation.
I'm not quite sure either as far as that goes. I need to read into it a little more.
Regardless, funnow, FPGA still has a future in either application, and really any application. That is why FPGA's are so widely used. I would definitely learn how to build a FPGA solution for BTC, that will get you started. And once you learn the basics of FPGA's, Verilog, Simulations, PCB Design, etc., then start learning how you may implement a scrypt bitstream into an FPGA.
You would probably get better response if you started a new thread about this subject.
FPGA's have internal memory. The size is limited, but the memory access has very low latency. Further it's no problem to add external DDR3 or other types of external memory to the FPGA. Most modern FPGA's will typically contain one or more hard memory controllers.
I don't know anything about the memory access pattern of a litecoin application, but I got the impression that it's basically a large cache. You could treat all the internal memory as a cache with low latency access for the external DDR3 memory. The good thing about the FPGA is that you could potentially tune the cache replacement algorithm towards the application, which is something that would be difficult on a CPU. However, I don't know much about scrypt so I can't be more specific.
FPGA's have internal memory. The size is limited, but the memory access has very low latency. Further it's no problem to add external DDR3 or other types of external memory to the FPGA. Most modern FPGA's will typically contain one or more hard memory controllers.
I don't know anything about the memory access pattern of a litecoin application, but I got the impression that it's basically a large cache. You could treat all the internal memory as a cache with low latency access for the external DDR3 memory. The good thing about the FPGA is that you could potentially tune the cache replacement algorithm towards the application, which is something that would be difficult on a CPU. However, I don't know much about scrypt so I can't be more specific.
Haha, I believe those chips could perform quite adequately. The paper written for Litecoin applications was written a while ago, and we're talking about new FPGA technology, even though yes the more memory the better for scrypt.
Granted nobody has developed a legitimate and power efficient method for mining LTC with FPGA's. What I'm saying is FPGA's give you that opportunity if need be, so that you're not wasting time designing the hardware for something.
Granted nobody has developed a legitimate and power efficient method for mining LTC with FPGA's. What I'm saying is FPGA's give you that opportunity if need be, so that you're not wasting time designing the hardware for something.
kingcoin -> for now I can only say thank you. I have to talk with some potential investors in the project, so for now I can't pay you for your help.
No problem. I did not expect to get payed. These are very expensive FPGA's. In general the cheaper FPGA's will usually get you higher H/s/$. But of course I don't know what kind of deal you can get.
I would be very curious to know what khash/s it could achieve for LTC. Nobody has (atleast in public) claimed to be mining LTC with FPGA.
I dont know much about FPGA or embedded programming, but from what i read, scrypt is very sensitive to the amount of fast RAM available to the cores.. The new expensive FPGAs apparently have them in abundance..
Further reading: http://bitcoin.stackexchange.com/questions/1305/what-features-of-scrypt-make-tenebrix-gpu-resistant
Well FPGA's are reprogrammable. A well thought out design could easily be programmed to do BTC and then be flashed to do scrypt for LTC.
so no LTC mining that's all kingcoin -> for now I can only say thank you. I have to talk with some potential investors in the project, so for now I can't pay you for your help.
No problem. I did not expect to get payed. These are very expensive FPGA's. In general the cheaper FPGA's will usually get you higher H/s/$. But of course I don't know what kind of deal you can get.
I would be very curious to know what khash/s it could achieve for LTC. Nobody has (atleast in public) claimed to be mining LTC with FPGA.
I dont know much about FPGA or embedded programming, but from what i read, scrypt is very sensitive to the amount of fast RAM available to the cores.. The new expensive FPGAs apparently have them in abundance..
Further reading: http://bitcoin.stackexchange.com/questions/1305/what-features-of-scrypt-make-tenebrix-gpu-resistant
Well FPGA's are reprogrammable. A well thought out design could easily be programmed to do BTC and then be flashed to do scrypt for LTC.
Kintex VII is slower the 410 series is about 1Gh/s
Virtex VII 1-3Gh/s
Stratix V +5% more
Those details I get from some companies doing lot with chips. So why they would tell me something that is not true?
Virtex VII 1-3Gh/s
Stratix V +5% more
Those details I get from some companies doing lot with chips. So why they would tell me something that is not true?
It's difficult to compare FPGA families since the members of the families are available in different sizes and speed grades. It might be that they have compared the fastest/biggest devices in each family though. Still they should tell you exactly which device they have compared. It might be that they have used a different design than the one I've tested. It might be that they have used different optimizations for the different devices. It might also be that they have done a general comparison from other designs and used that to estimate the hashing speed for the various devices. So everybody could be telling you the truth, but all the parameters for the given results have not been given.
Also note that the Stratix V device I used was not the faster nor the biggest available.
[quote au+thor=funnow link=topic=176945.msg1901732#msg1901732 date=1366541912]
Virtex-7 -> It will not be used!
Virtex-7 -> It will not be used!
I don't know why you ruled out the Virtex7. I just gave the biggest member (xc7v2000t) of the Virtex7 family a run through Vivado. I constrained the clocks at 200MHz and the timing was reported as 4.575ns or 218Mhz. The utilization of a single core was
Code:
+----------------------------+-------+-------+-----------+-------+
| Site Type | Used | Loced | Available | Util% |
+----------------------------+-------+-------+-----------+-------+
| Slice LUTs | 44753 | 0 | 1221600 | 3.66 |
| Site Type | Used | Loced | Available | Util% |
+----------------------------+-------+-------+-----------+-------+
| Slice LUTs | 44753 | 0 | 1221600 | 3.66 |
Hence it might be possible to fit 27 hash cores (- logic to communicate with the cores) in the device which would lead to a hashing performance of 5.8Gh/s assuming timing would be the same for 27 cores. Others on the forum have optimized the design using the Xilinx DSP blocks (this device has 2160 of them) and did run the Kintex7 at much higher frequencies. This is a very expensive FPGA. But again, I don't know what kind of deal you can get.
[/quote]
Kintex VII is slower the 410 series is about 1Gh/s
Virtex VII 1-3Gh/s
Stratix V +5% more
Those details I get from some companies doing lot with chips. So why they would tell me something that is not true?
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