Topic: The State of the ASIC Market (Read 4489 times)

I've suggested the same scenario on the BFL forums, and Josh has that while he's not sure on the specifics of the change, that is likely.

This is both true and false depending on how you interpret it.

It is true because you cannot (reasonably or easily) use silicon designed for a QFN package (with edge bond wires) for a flip-chip BGA package (with an array of balls on the silicon similar to a tiny BGA).

It is false because the following scenario is possible.  We do something very similar with some of our chips.
1) Tape-out all layers to the fab.
2) The fab starts the N-week process with the bottom layers.
3) We realize we have a bug (or BFL decides to switch from QFN to FCBGA)
4) We make the changes to the top layer(s) of metal and tape-out only these top layer(s)
(Note that the wafers are not yet at the step where the top layers are done.)
5) The fab charges us a boatload of money for new top layer masks and they use these new masks when the wafers get to that step.

My best GUESS as to the events of BFL's silicon are that they actually got some engineering samples of their chips in a QFN package back in November or December and realized they generated too much heat for that package and melted some.  So they made the changes to the mask set and did another tape-out for these changes.  If the fab was already past this step, a fresh batch of wafers would need to be started (and the old ones scrapped).  If you assume BFL is genuine in delivering an ASIC product ASAP, then their delay stories are consistent with the above.

It does appear to me that the public chip photo is one of a wire bond (QFN package) design, not a FCBGA design.  Unless there is a new photo out (I've been away from the forums for 1.5 weeks or so).

Disclaimers:
I ordered 1 BFL SC single.  All I have so far is an email receipt but I believe I will get my SC very soon.
I ordered 1 bASIC and now have my refund - which I will likely re-invest in another BFL SC or an Avalon.
I do not work for any bitcoin ASIC company and have no "insider knowledge" of them beyond what is posted on the public forums.
I do work for a non-bitcoin ASIC company and have been working in this industry for over 25 years.  (I started with a 2 micron = 2000nm process!  )

The countdown timer is for when they ship the first units.  It says "ships in" directly above the timer.

As I understand it, all 300 units won't be shipped tonight.


http://support.avalon-asic.com/solution/categories/40996/folders/66201/articles/31066-when-are-the-avalon-asics-shipping-

This post from BitSyncom earlier today regarding shipping options also suggests that not all units will be shipped tonight.


https://bitcointalksearch.org/topic/m.1464530

If you're going to export 300 units at once, you don't leave sorting out shipping preferences until the day of shipment - the paperwork's too much of a pain in the ass to do it at the last moment.

Maybe I'm missing something, but what is the countdown timer to if it isn't the ship date?  Is that when things are supposed to be shown off?

Personally I don't care about one company Vs another in a he said she said game.  It's all just words until someone can actually show a working product, and I think that is all anyone cares about.

thatjusthappened.jpg

I have no time to "troll" unlike majority of people on this forum who don't even have the knowledge to make a educated guess when it comes to ASIC production where statements are made purely based on baseless assumptions.

See below for example:

I'm just calling on their lies made in the past now have surfaced like how they mentioned to switch QFN to BGA packaging in December whilst saying they are supposedly waiting a fuzzy date from the foundry on when the chip is coming around the same time, anyone with IC knowledge can tell you this is impossible. I'm not looking for any proofs because there isn't any.

@ BitSyncom sense your saying you haven't seen any results from BFL then this must mean you're prepared to show your results. If you do have any results to show. At this point you must have completed your production run and have begun burn in testing. Let's see a video of those units hashing. But we know you can't do that. At the same time you are looking for such proof from BFL.

BitSyncom don't blame 'bad luck' if you are unable to meet your stated shipment date because we know that it's just bad management from university students.

??

You're not making sense...what's your point? You asked for opinions on when a delay can become a scam. I offered the opinion of "never" since a scam implies malice (which won't be present if the company really does intend to ship...), and you can't delay something that isn't coming. If you delayed right now to your original shipping date, I'd probably attribute that to bad luck, since your team seems pretty competent.

By the way, how come you have time to troll Josh? I thought you were so busy trying to ship that you couldn't update...

Oh come on. BFL said BFL wouldn't be hashing at CES.

I notice that you carefully avoid saying that he's actually wrong here, presumably because you know he isn't - there's no way for you to go from wirebonded QFN to flip-chip BGA without taping out again.

I think even if AVALON or BFL supplied product @ %50 of spec G/Hash used %500 more power customers would be happy

This is where allowances are made due to start up's

Ball is in both BFL & Avalon court

FTFY. Historically BFL has only failed in every "impossible" task they have attempted, and till this date have no results.
  

Sorry Inaba, but you are completely full of shit.  Completely.
You've continue to refresh what I've thought was the rock bottom of your ability to construct a logical response. The delusional confidence you have from a mere simulation is laughable.

I wish you best of luck for when if you get your chips back at the end of this month a miracle descents and BFL is able to meet your 1.2w per Gh/s fallacy

p.s.
You are not the only one with 65nm simulations.


This is purpose of this thread and it should apply to every ASIC manufacture, Avalon included, but not limited to.


Really now? Maybe I should announce we'll be shipping at our original shipping date of end of Feb, 2013 due to "bad luck"

The same thing as BFL and bASIC customers....wait.

At least their delays aren't all that long.

He's just worried.

They probably let him know something unfortunate when he got to the chip plant in Calfifornia.

Take a look at the BFL twitter feed. He said it was a long day. I wonder what that means. Typically you would hear him expunge himself of utter enthusiam for things going great.

I am guessing...something did not go well.

P.S. For the uneducated the packaging part of the process is where they also test and check the chips performance values.

Uh, no it doesn't.

See BFL @ CES 2013.

Change the word stick with Fact and you have a conversation worth holding.

BitSyncom stated that BFL would not be ready as claimed. They weren't. See the posting on BFL forums for that.

BitSyncom also stated that a production of ASIC is a known process governed by physics. It is a predictable process. Again Josh refutes this in his ignorance.

What happened in January? (30 days later)

They still didn't have the chips ready. Was this predictable based on the manifacturing cycle? Yes.

----------------------------

Now Bitsyncom is providing more claims, that a package change cannot be done on "a whim". That it would require significant changes?

In all of your post you do not deny this. Here take a look at what you wrote:

Because he is in the same buisness as you. And knows enough about making ASIC (even if on a larger process) to know when you are pulling a bullshit stunt to buy "extra time".

Which is...coincidentally....the trend.


Josh levels the demand just days before having told his customers (paraphrased):

"It will be ready in another month. Just wait. Oh, and I have some goodies of more pictures for you to contend with."

LOL, in one breath he states the age of the process was developed and used in the world of technology, but gladfully omits that 90nm and 65nm was developed almost ten years ago.

Does that put things into perspective? Nah. Blowing more smoke.

Oh, and he finishes it off "professionally" with a "so enjoy the few weeks of glory you will have if you can manage to ship a working product that doesn't melt."

Which is coincidentally what happened to his plastic packaged BFL ASICs when they were checked in December. (keep in mind we are now in the later fringes of Mid-January)

You can't make this kind of comedy up!



Said by the guy who's chips melted....

(Ah, by the way, bASIC was going to release 1.4w per GH/s chips @ 90nm)

(BFL is now going to release up to 1.2w per GH/s chips @ 65nm)

Heh.

Run Forest Run !!

So what will people do when there are no avalons next week?

Panic?

Network total: 23.555 Thash/s

Still... Hehe.