Topic: X6500 Custom FPGA Miner - page 32. (Read 219954 times)

one of these per board, (2x thermocouple per controller)
http://www.amazon.com/Ultra-ULT40123-MD3-Media-Dashboard/dp/B000ZN2KEQ/ref=sr_1_8?ie=UTF8&qid=1328064723&sr=8-8

Yep np.

The best solution of course to all of this is upstream your changes to pyusb (if you haven't already) so that eventually the distro's version will be sufficient.

Does the licence on libftd2xx allow redistribution?  it might be easier on people to distribute that (the "working" 1.0.4 version) and the modified pyusb within your git tree.  Then you could provide an example shell script to launch using LD_PRELOAD and PYTHONPATH, with a note in the readme/instructions on fpgamining.com that this method of launching is available.

Re pausing: does simply stopping mining reduce power and temperature? or is it simply once the fpga is programmed its always using its max power?  The latter would explain why your pausing function is important.

I've been looking for a (cheap) usb external temperature probe system which supports multiple sensors on the same USB device. I'd like to connect the sensors to the heatsinks, and string together scripts to stop mining (or even better use your "pause" function) if temp goes above a threshold.

Thanks for the work!

Would there be a way to mount a temp sensor under the chips?

Yep, lots of people have used 180 MHz with the board right out of the box and it seems to work well. Of course, you will need the fan. It's a good idea to channel the air from that big fan a little bit so that it's moving at maximum velocity as it passes over the FPGAs. A few strategically placed pieces of cardboard might help a lot. You'll have to play around to see what works well for you!

I would love to see how your cooling experiments go!

Thanks!

Spartan 6s do not include internal temp sensors, unfortunately. The only feedback you really get is from the number of invalids, and I'm not 100% confident that using that is completely bullet proof. It also has the problem that it can take a while to get reasonable feedback on this. At 200 MHz you're getting 1 nonce roughly every 20 seconds it would take 200 seconds to get an invalid (based on 10% invalids). Still, this is a good idea to use as a backup measure. 3 or 4 minutes at an unsafe temperature is a lot better than 3 or 4 hours.

The other problem is that we haven't worked out a really good way to pause and resume the FPGA. I pushed some new code to Github last week that experiments with this, but it's not ready for the real thing yet. Pausing seems to work perfectly, and it brings power usage down to basically zero, but waking the FPGA back up seems to not work right once every 10 times or so. When this happens, the FPGA reports only invalid nonces and the only way to recover it is to reprogram.

Anyway, this is a work in progress. I think we'll get something good figured out soon. Until then, keep an eye on your FPGAs!

Beautiful! I knew I was doing things in a bad way, but didn't know a good way to do it. I'm going to follow your recommendations when I set up a new machine this week. If it works out well for me I'd like to incorporate it in the user guide on the website, if that's alright with you.

Thanks for sharing!

Except that they seem to be sold out of x6500s currently

Yes they accept bitcoins, check out cablesaurus website mate, they have the usb cable and everything else you could need.

Heres something for Linux users I worked out a while back but haven't had a chance to share yet.

As most people running Linux know, writing to system folders manually (outside of your distro's package management system), is a seriously bad idea.

That is (from http://fpgamining.com/software at time of writing), this:
and this:
bad, bad, bad! 

Heres how to run fizzisist's pyusb and the FTDID2XX driver stack without polluting your system folders with files your package manager doesn't know about.

I have directories and some scripts set up as follows, under my fpgaminer user's home directory:
./bin
./bin/list_x6500s.sh
./bin/program_x6500_0.sh
./bin/program_x6500_1.sh
./bin/mine_x6500_0.sh
./bin/mine_x6500_1.sh
./x6500/fizzisist-x6500-miner-007fcc8      (contains unzipped zipball of latest git code)
./x6500/bitstreams                     (all the *.bit files)
./x6500/libftd2xx1.0.4                 (contains untarred ftdi d2xx driver)
./x6500/PyUSB-1.6-fizzisist-linux   (contains fizzisist's modified pyusb, untarred)


My fpgamining user is a member of my distro's "usb" group which gives it permissions to write directly to the correct usb devices in /dev, without needing to use sudo at all.

Heres a cat of one of my program_x6500 scripts:

Note the trick of setting "LD_PRELOAD" environment variable, which lets you manually specify to preload libraries which are not in the system library search path, and the PYTHONPATH, which does the same thing for non-system python files.

voila: I only needed sudo to useradd the fpgamining user.  Everything runs non-root, and without breaking my distro-installed pyusb etc, because it's all nicely self contained in one directory under /home.

for completeness sake: heres one of my mining scripts:

I'm running gentoo linux, if anyone was interested, but the above should apply for almost any linux distro.

Are they accepting bitcoins as payment.

It doesn't come with cables. You need mini-USB to USB cable (http://www.amazon.com/AmazonBasics--Male-Mini-B-Cable-Meters/dp/B001TH7GUK/ref=sr_1_2?ie=UTF8&qid=1327971683&sr=8-2). And either a power supply with a free molex connector or a barrel power adapter http://cablesaurus.com/ac-adapter-12v-20a-100-240v-50-60hz .

What cables are needed for an fpga.  Do they come with it or do I have to buy them seperate.  Thanks.

Yep just cable ties through holes drilled in the motherboard mounting plate.

Yep I bought one of those, which I'll use when I get more boards. The plan was to switch 12/5V pins on 5 of the 8 connectors (labeling them clearly!) making 5 x 12V and 3 x 5V to correctly load the power supply.

I'm also planning on perspex sides and tops for the fan tunnel, and an idea i had yesterday was some sort of fast strobing LEDs on each fan so i can visually check everything is turning. Failing that, just standard leds. And for visual checks, I'll cut a big square out of the side panel of the case for perspex.

Temp measurements with fans @7V, x6500's @ 180mhz, and no side tunnel walls on the fans: 41C lower and 43C top,  ~1% rejects.

fizzisist: Do the fgpa's have a temp sensor in them we can read back? Could you make a command line option for a "pausing" temperature threshold while the fpga is above a certain temp? 

Failing that, could you make a command line option reject rate pausing threshold? ie 3 parameters, possibly with the following defaults: if the reject/invalid rate within the last 30s goes above 10%, indicating something is most certainly wrong, pause for 120s to let things cool a bit. 

This throttling will no doubt save many fpga's from disaster as more people start pushing them harder, and fans start failing over time etc.

i think those are
    wire tie
    cable fixer
    lace
    cable tie
don't know the right translation
i also use them for my seconed fan

and some stats
418.06 MH/s 0: 12488/127/1 1.0%/0.0% 1: 12506/131/14 1.0%/0.1% 3d3h27m

395MH/s over all 3 days

Just wanted to drop in and introduce myself; I'm new to the FPGA scene and have recently purchased an X6500 (Dominator)! I'll be getting my unit either late this week or early next week and wanted some basic advice on the unit:

1.)I'm currently shopping for Thermal Adhesive; before my adhesive arrives would it be safe to run my unit with the 180mhz bitstream and active cooling (I plan on having a 120mm fan actively cooling the card)?

2.) For people who own the unit with the stock heat sinks; do you find the stock sinks to be enough? Do you have any other ones you might recommend?

I plan on playing around with various cooling schemes for my x6500 (which I will share in later post with pics!) and if the mining goes well I may get a second unit!


Cheers,
nbtcminer

394.73 MH/s | 0: 8017/163/153 2.0%/1.8% | 1: 8091/122/52 1.5%/0.6% | 2d2h43m | AH00WOWI

Stales/rejects are slightly higher (~1-2%) with 200mhz, but hashrate is steady around 390Mhz now. Awesome!!

I had one FPGA that was behaving poorly (~10% rejects). Popping the heatsink off and reseating it solved the problem....you may want to try that. Heat seems to be directly correlated with the amount of stales/rejects.

All my boards are running the 200MHz bitstream, and have been up for 4 days now.

All cores giving ~0.8% rejects, except 2: AH00WOW1 core 1 is 10%, AH00WOW4 core 0 is 3.5%, so my lowest performing chip is returning 180MH/s.

Fantastic product!

He straps them down using some kind of cable through holes near the fans.
See this picture.


The problem with this is that you have the molex connection on one side and the usb on the other.

According to the thermal image that was posted earlier, the hot air from one chip was blowing over the other chip, causing the second chip to be warmer than the first. Would it be possible to turn the heatsinks 90 degree sideways, so that the airflow goes over both chips in parallel, instead of in series? It seems that that would ensure the longest lifespan.

Then, you could stack them up in a high-rise configuration and just keep going up up up!

That is awesome! I'm thoroughly impressed. I've been working on something similar, but not nearly as nicely done or well planned. I'm hoping to fit a few towers inside a case that's also housing a PSU and mini-ITX mobo. I got as far as removing the hard drive cage and drilling a few holes for the X6500s.

How are you mounting the fans? I was having trouble there, because I thought I would use angle bracket but the bracket is too tall that it blocks some of the air flow.

I love how carefully you routed the cables. When you have 5 board stacks, I highly recommend these types of splitters: http://cablesaurus.com/8-slot-4-pin-molex-splitter, but make sure you switch to 12V at the input of that. If you leave all the boards on 5V, you're drawing potentially 4*5 A through the first connector.