Viper ASIC Update(Litecoin)
Neptunes are still very much in the preliminary design phase. As much as the timeline will be reduced significantly in comparison to a standard engineering project at 20nm, if such exists, because this is absolute bleeding edge we want to be absolutely sure what we commit to silicon will ensure a successful product at the end. This initial phase will not be rushed.
That said we have completely re-written and optimised the RTL code. The Jupiter project was very much focused upon safe speed to market and the window of opportunity hashing power presented in this present finite period prior to significant competition. The Neptune project whilst adhering to aspects of the aforementioned must focus upon power consumption as it's primary trait if customers (you guys) will be able to compete successfully over a longer period. We know that we are reaching limits on standard household circuits, we want you to remain competitive w.r.t. the unfolding mining landscape and we are all to well aware that electricity costs will come into focus in the not too distant future.
So where we are now is that we have a working FPGA code and are in the process of testing that and tweaking any further refinements before it's submission.
With respect to the speculation above we sold out of Neptune's last night.
Viper ASIC Timeline ReleasedThat said we have completely re-written and optimised the RTL code. The Jupiter project was very much focused upon safe speed to market and the window of opportunity hashing power presented in this present finite period prior to significant competition. The Neptune project whilst adhering to aspects of the aforementioned must focus upon power consumption as it's primary trait if customers (you guys) will be able to compete successfully over a longer period. We know that we are reaching limits on standard household circuits, we want you to remain competitive w.r.t. the unfolding mining landscape and we are all to well aware that electricity costs will come into focus in the not too distant future.
So where we are now is that we have a working FPGA code and are in the process of testing that and tweaking any further refinements before it's submission.
With respect to the speculation above we sold out of Neptune's last night.
Quote
On Monday (13/01/2014) we released an outline of our set roadmap, today as promised we will be releasing a timeline with dates on each aspect of the development process. This shows our commitment to transparency and gives a better idea on what exact stage we are on at all times. As we go through multiple developmental stages in parallel, we will be releasing regular detailed updates on our progress. Our next updates will be consistent developmental updates on what is being worked on and what has been achieved.
Timeline:
Project Start: 16/08/13
Project Finish: 15/07/14
<-- Table Snipped See Posts for table -->
Roadmap (recap):
<-- Image Snipped See Posts for Images -->
Timeline:
Project Start: 16/08/13
Project Finish: 15/07/14
<-- Table Snipped See Posts for table -->
Roadmap (recap):
<-- Image Snipped See Posts for Images -->
I hope 
Who dares wins, without risk there's no reward and remember we're in the game of buying magic money making machines 
